Commit aa0170ff authored by Stefan Richter's avatar Stefan Richter

firewire: ohci: fix TI TSB82AA2 regression since 2.6.35

Revert commit 54672386
"firewire: ohci: fix up configuration of TI chips".
It caused massive slow-down and data corruption with a TSB82AA2 based
StarTech EC1394B2 ExpressCard and FireWire 800 harddisks.

https://bugs.launchpad.net/ubuntu/+source/linux/+bug/657081
http://thread.gmane.org/gmane.linux.kernel.firewire.user/4013

The fact that some card EEPROMs do not program these enhancements may be
related to TSB81BA3 phy chip errata, if not to bugs of TSB82AA2 itself.
We could re-add these configuration steps, but only conditional on a
whitelist of cards on which these enhancements bring a proven positive
effect.
Reported-and-tested-by: default avatarEric Shattow <lucent@gmail.com>
Cc: Clemens Ladisch <clemens@ladisch.de>
Cc: <stable@kernel.org> 2.6.35
Signed-off-by: default avatarStefan Richter <stefanr@s5r6.in-berlin.de>
parent cd07202c
...@@ -2840,7 +2840,7 @@ static int __devinit pci_probe(struct pci_dev *dev, ...@@ -2840,7 +2840,7 @@ static int __devinit pci_probe(struct pci_dev *dev,
const struct pci_device_id *ent) const struct pci_device_id *ent)
{ {
struct fw_ohci *ohci; struct fw_ohci *ohci;
u32 bus_options, max_receive, link_speed, version, link_enh; u32 bus_options, max_receive, link_speed, version;
u64 guid; u64 guid;
int i, err, n_ir, n_it; int i, err, n_ir, n_it;
size_t size; size_t size;
...@@ -2894,23 +2894,6 @@ static int __devinit pci_probe(struct pci_dev *dev, ...@@ -2894,23 +2894,6 @@ static int __devinit pci_probe(struct pci_dev *dev,
if (param_quirks) if (param_quirks)
ohci->quirks = param_quirks; ohci->quirks = param_quirks;
/* TI OHCI-Lynx and compatible: set recommended configuration bits. */
if (dev->vendor == PCI_VENDOR_ID_TI) {
pci_read_config_dword(dev, PCI_CFG_TI_LinkEnh, &link_enh);
/* adjust latency of ATx FIFO: use 1.7 KB threshold */
link_enh &= ~TI_LinkEnh_atx_thresh_mask;
link_enh |= TI_LinkEnh_atx_thresh_1_7K;
/* use priority arbitration for asynchronous responses */
link_enh |= TI_LinkEnh_enab_unfair;
/* required for aPhyEnhanceEnable to work */
link_enh |= TI_LinkEnh_enab_accel;
pci_write_config_dword(dev, PCI_CFG_TI_LinkEnh, link_enh);
}
ar_context_init(&ohci->ar_request_ctx, ohci, ar_context_init(&ohci->ar_request_ctx, ohci,
OHCI1394_AsReqRcvContextControlSet); OHCI1394_AsReqRcvContextControlSet);
......
...@@ -155,12 +155,4 @@ ...@@ -155,12 +155,4 @@
#define OHCI1394_phy_tcode 0xe #define OHCI1394_phy_tcode 0xe
/* TI extensions */
#define PCI_CFG_TI_LinkEnh 0xf4
#define TI_LinkEnh_enab_accel 0x00000002
#define TI_LinkEnh_enab_unfair 0x00000080
#define TI_LinkEnh_atx_thresh_mask 0x00003000
#define TI_LinkEnh_atx_thresh_1_7K 0x00001000
#endif /* _FIREWIRE_OHCI_H */ #endif /* _FIREWIRE_OHCI_H */
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