Commit aa9e7d78 authored by Bhuvanchandra DV's avatar Bhuvanchandra DV Committed by Greg Kroah-Hartman

tty: serial: fsl_lpuart: Fix broken 8m/s1 support

By default the driver always configure the mode as 8s1 even when 8m1 mode is
selected. Fix this by adding support to control the space/mark bit.
Signed-off-by: default avatarBhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent d68827c6
...@@ -1220,13 +1220,14 @@ lpuart_set_termios(struct uart_port *port, struct ktermios *termios, ...@@ -1220,13 +1220,14 @@ lpuart_set_termios(struct uart_port *port, struct ktermios *termios,
{ {
struct lpuart_port *sport = container_of(port, struct lpuart_port, port); struct lpuart_port *sport = container_of(port, struct lpuart_port, port);
unsigned long flags; unsigned long flags;
unsigned char cr1, old_cr1, old_cr2, cr4, bdh, modem; unsigned char cr1, old_cr1, old_cr2, cr3, cr4, bdh, modem;
unsigned int baud; unsigned int baud;
unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
unsigned int sbr, brfa; unsigned int sbr, brfa;
cr1 = old_cr1 = readb(sport->port.membase + UARTCR1); cr1 = old_cr1 = readb(sport->port.membase + UARTCR1);
old_cr2 = readb(sport->port.membase + UARTCR2); old_cr2 = readb(sport->port.membase + UARTCR2);
cr3 = readb(sport->port.membase + UARTCR3);
cr4 = readb(sport->port.membase + UARTCR4); cr4 = readb(sport->port.membase + UARTCR4);
bdh = readb(sport->port.membase + UARTBDH); bdh = readb(sport->port.membase + UARTBDH);
modem = readb(sport->port.membase + UARTMODEM); modem = readb(sport->port.membase + UARTMODEM);
...@@ -1274,7 +1275,10 @@ lpuart_set_termios(struct uart_port *port, struct ktermios *termios, ...@@ -1274,7 +1275,10 @@ lpuart_set_termios(struct uart_port *port, struct ktermios *termios,
if ((termios->c_cflag & PARENB)) { if ((termios->c_cflag & PARENB)) {
if (termios->c_cflag & CMSPAR) { if (termios->c_cflag & CMSPAR) {
cr1 &= ~UARTCR1_PE; cr1 &= ~UARTCR1_PE;
cr1 |= UARTCR1_M; if (termios->c_cflag & PARODD)
cr3 |= UARTCR3_T8;
else
cr3 &= ~UARTCR3_T8;
} else { } else {
cr1 |= UARTCR1_PE; cr1 |= UARTCR1_PE;
if ((termios->c_cflag & CSIZE) == CS8) if ((termios->c_cflag & CSIZE) == CS8)
...@@ -1342,6 +1346,7 @@ lpuart_set_termios(struct uart_port *port, struct ktermios *termios, ...@@ -1342,6 +1346,7 @@ lpuart_set_termios(struct uart_port *port, struct ktermios *termios,
writeb(cr4 | brfa, sport->port.membase + UARTCR4); writeb(cr4 | brfa, sport->port.membase + UARTCR4);
writeb(bdh, sport->port.membase + UARTBDH); writeb(bdh, sport->port.membase + UARTBDH);
writeb(sbr & 0xFF, sport->port.membase + UARTBDL); writeb(sbr & 0xFF, sport->port.membase + UARTBDL);
writeb(cr3, sport->port.membase + UARTCR3);
writeb(cr1, sport->port.membase + UARTCR1); writeb(cr1, sport->port.membase + UARTCR1);
writeb(modem, sport->port.membase + UARTMODEM); writeb(modem, sport->port.membase + UARTMODEM);
......
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