Commit ab03e604 authored by Masahiro Yamada's avatar Masahiro Yamada

ia64: replace #include <asm/export.h> with #include <linux/export.h>

Commit ddb5cdba ("kbuild: generate KSYMTAB entries by modpost")
deprecated <asm/export.h>, which is now a wrapper of <linux/export.h>.

Replace #include <asm/export.h> with #include <linux/export.h>.

After all the <asm/export.h> lines are converted, <asm/export.h> and
<asm-generic/export.h> will be removed.
Signed-off-by: default avatarMasahiro Yamada <masahiroy@kernel.org>
parent ee8aff7f
......@@ -37,7 +37,7 @@
* pNonSys: !pSys
*/
#include <linux/export.h>
#include <linux/pgtable.h>
#include <asm/asmmacro.h>
#include <asm/cache.h>
......@@ -49,7 +49,6 @@
#include <asm/thread_info.h>
#include <asm/unistd.h>
#include <asm/ftrace.h>
#include <asm/export.h>
#include "minstate.h"
......
......@@ -34,9 +34,9 @@
#define PSR_BITS_TO_SET \
(IA64_PSR_BN)
#include <linux/export.h>
#include <asm/processor.h>
#include <asm/asmmacro.h>
#include <asm/export.h>
/*
* Inputs:
......
......@@ -20,7 +20,7 @@
* Support for CPU Hotplug
*/
#include <linux/export.h>
#include <linux/pgtable.h>
#include <asm/asmmacro.h>
#include <asm/fpu.h>
......@@ -33,7 +33,6 @@
#include <asm/mca_asm.h>
#include <linux/init.h>
#include <linux/linkage.h>
#include <asm/export.h>
#ifdef CONFIG_HOTPLUG_CPU
#define SAL_PSR_BITS_TO_SET \
......
......@@ -47,7 +47,7 @@
* Table is based upon EAS2.6 (Oct 1999)
*/
#include <linux/export.h>
#include <linux/pgtable.h>
#include <asm/asmmacro.h>
#include <asm/break.h>
......@@ -58,7 +58,6 @@
#include <asm/thread_info.h>
#include <asm/unistd.h>
#include <asm/errno.h>
#include <asm/export.h>
#if 0
# define PSR_DEFAULT_BITS psr.ac
......
......@@ -13,9 +13,9 @@
* 05/24/2000 eranian Added support for physical mode static calls
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/processor.h>
#include <asm/export.h>
.data
pal_entry_point:
......
......@@ -10,9 +10,9 @@
* 3/08/02 davidm Some more tweaking
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/page.h>
#include <asm/export.h>
#ifdef CONFIG_ITANIUM
# define L3_LINE_SIZE 64 // Itanium L3 line size
......
......@@ -12,8 +12,8 @@
* Stephane Eranian <eranian@hpl.hp.com>
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/export.h>
//
// arguments
......
......@@ -15,9 +15,9 @@
*
* 4/06/01 davidm Tuned to make it perform well both for cached and uncached copies.
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/page.h>
#include <asm/export.h>
#define PIPE_DEPTH 3
#define EPI p[PIPE_DEPTH-1]
......
......@@ -60,9 +60,9 @@
* to fetch the second-half of the L2 cache line into L1, and the tX words are copied in
* an order that avoids bank conflicts.
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/page.h>
#include <asm/export.h>
#define PREFETCH_DIST 8 // McKinley sustains 16 outstanding L2 misses (8 ld, 8 st)
......
......@@ -30,8 +30,8 @@
* - fix extraneous stop bit introduced by the EX() macro.
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/export.h>
//
// Tuneable parameters
......
......@@ -8,9 +8,8 @@
* 05/28/05 Zoltan Menyhart Dynamic stride size
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/export.h>
/*
* flush_icache_range(start,end)
......
......@@ -15,8 +15,8 @@
* (http://www.goodreads.com/book/show/2019887.Ia_64_and_Elementary_Functions)
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/export.h>
#ifdef MODULO
# define OP mod
......
......@@ -15,8 +15,8 @@
* (http://www.goodreads.com/book/show/2019887.Ia_64_and_Elementary_Functions)
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/export.h>
#ifdef MODULO
# define OP mod
......
......@@ -13,8 +13,8 @@
* Copyright (C) 2002, 2006 Ken Chen <kenneth.w.chen@intel.com>
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/export.h>
/*
* Since we know that most likely this function is called with buf aligned
......
......@@ -14,8 +14,8 @@
* Stephane Eranian <eranian@hpl.hp.com>
* David Mosberger-Tang <davidm@hpl.hp.com>
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/export.h>
GLOBAL_ENTRY(memcpy)
......
......@@ -14,9 +14,9 @@
* Copyright (C) 2002 Intel Corp.
* Copyright (C) 2002 Ken Chen <kenneth.w.chen@intel.com>
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/page.h>
#include <asm/export.h>
#define EK(y...) EX(y)
......
......@@ -18,8 +18,8 @@
Since a stf.spill f0 can store 16B in one go, we use this instruction
to get peak speed when value = 0. */
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/export.h>
#undef ret
#define dest in0
......
......@@ -17,8 +17,8 @@
* 09/24/99 S.Eranian add speculation recovery code
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/export.h>
//
//
......
......@@ -17,8 +17,8 @@
* by Andreas Schwab <schwab@suse.de>).
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/export.h>
GLOBAL_ENTRY(__strncpy_from_user)
alloc r2=ar.pfs,3,0,0,0
......
......@@ -13,8 +13,8 @@
* Copyright (C) 1999, 2001 David Mosberger-Tang <davidm@hpl.hp.com>
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/export.h>
GLOBAL_ENTRY(__strnlen_user)
.prologue
......
......@@ -5,8 +5,8 @@
* Optimized RAID-5 checksumming functions for IA-64.
*/
#include <linux/export.h>
#include <asm/asmmacro.h>
#include <asm/export.h>
GLOBAL_ENTRY(xor_ia64_2)
.prologue
......
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