Commit ab6cf139 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Mark Brown

ASoC/MFD: twl6040: Combine bit definitions for Headset control registers

Use one set of defines for the HS bits, since they are identical in both
control register.
Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: default avatarLiam Girdwood <lrg@ti.com>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent d13f1fe0
......@@ -120,15 +120,10 @@
#define TWL6040_LPLLFIN 0x08
#define TWL6040_HPLLSEL 0x10
/* HSLCTL (0x10) fields */
/* HSLCTL/R (0x10/0x11) fields */
#define TWL6040_HSDACMODEL 0x02
#define TWL6040_HSDRVMODEL 0x08
/* HSRCTL (0x11) fields */
#define TWL6040_HSDACMODER 0x02
#define TWL6040_HSDRVMODER 0x08
#define TWL6040_HSDACMODE (1 << 1)
#define TWL6040_HSDRVMODE (1 << 3)
/* VIBCTLL (0x18) fields */
......
......@@ -642,7 +642,7 @@ static int pga_event(struct snd_soc_dapm_widget *w,
static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
{
int hslctl, hsrctl;
int mask = TWL6040_HSDRVMODEL | TWL6040_HSDACMODEL;
int mask = TWL6040_HSDRVMODE | TWL6040_HSDACMODE;
hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
......
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