drm/amdgpu: Cache result of last reset at reset domain level.
Will be read by executors of async reset like debugfs. Signed-off-by:Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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