Commit aba3a882 authored by Nicholas Mc Guire's avatar Nicholas Mc Guire Committed by Boris Brezillon

mtd: spi-nor: intel: provide a range for poll_timout

The overall poll time here is INTEL_SPI_TIMEOUT * 1000 which is
5000 * 1000 - so 5seconds and it is coded as a tight loop here delay_us
to readl_poll_timeout() is set to 0. As this is never called in an atomic
context sleeping should be no issue and there is no reasons for the
tight-loop here.
Signed-off-by: default avatarNicholas Mc Guire <der.herr@hofr.at>
Acked-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@bootlin.com>
parent dd50a1c4
...@@ -287,7 +287,7 @@ static int intel_spi_wait_hw_busy(struct intel_spi *ispi) ...@@ -287,7 +287,7 @@ static int intel_spi_wait_hw_busy(struct intel_spi *ispi)
u32 val; u32 val;
return readl_poll_timeout(ispi->base + HSFSTS_CTL, val, return readl_poll_timeout(ispi->base + HSFSTS_CTL, val,
!(val & HSFSTS_CTL_SCIP), 0, !(val & HSFSTS_CTL_SCIP), 40,
INTEL_SPI_TIMEOUT * 1000); INTEL_SPI_TIMEOUT * 1000);
} }
...@@ -296,7 +296,7 @@ static int intel_spi_wait_sw_busy(struct intel_spi *ispi) ...@@ -296,7 +296,7 @@ static int intel_spi_wait_sw_busy(struct intel_spi *ispi)
u32 val; u32 val;
return readl_poll_timeout(ispi->sregs + SSFSTS_CTL, val, return readl_poll_timeout(ispi->sregs + SSFSTS_CTL, val,
!(val & SSFSTS_CTL_SCIP), 0, !(val & SSFSTS_CTL_SCIP), 40,
INTEL_SPI_TIMEOUT * 1000); INTEL_SPI_TIMEOUT * 1000);
} }
......
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