Commit abbbbc83 authored by Will Deacon's avatar Will Deacon Committed by Catalin Marinas

asm-generic/io: Pass result of I/O accessor to __io_[p]ar()

The inX() and readX() I/O accessors must enforce ordering against
subsequent calls to the delay() routines, so that a read-back from a
device can be used to postpone a subsequent write to the same device.

On some architectures, including arm64, this ordering can only be
achieved by creating a dependency on the value returned by the I/O
accessor operation, so we need to pass the value we read to the
__io_par() and __io_ar() macros in these cases.
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Reported-by: default avatarAndrew Murray <andrew.murray@arm.com>
Reviewed-by: default avatarPalmer Dabbelt <palmer@sifive.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 3e32131a
...@@ -32,9 +32,9 @@ ...@@ -32,9 +32,9 @@
/* prevent prefetching of coherent DMA data ahead of a dma-complete */ /* prevent prefetching of coherent DMA data ahead of a dma-complete */
#ifndef __io_ar #ifndef __io_ar
#ifdef rmb #ifdef rmb
#define __io_ar() rmb() #define __io_ar(v) rmb()
#else #else
#define __io_ar() barrier() #define __io_ar(v) barrier()
#endif #endif
#endif #endif
...@@ -65,7 +65,7 @@ ...@@ -65,7 +65,7 @@
#endif #endif
#ifndef __io_par #ifndef __io_par
#define __io_par() __io_ar() #define __io_par(v) __io_ar(v)
#endif #endif
...@@ -158,7 +158,7 @@ static inline u8 readb(const volatile void __iomem *addr) ...@@ -158,7 +158,7 @@ static inline u8 readb(const volatile void __iomem *addr)
__io_br(); __io_br();
val = __raw_readb(addr); val = __raw_readb(addr);
__io_ar(); __io_ar(val);
return val; return val;
} }
#endif #endif
...@@ -171,7 +171,7 @@ static inline u16 readw(const volatile void __iomem *addr) ...@@ -171,7 +171,7 @@ static inline u16 readw(const volatile void __iomem *addr)
__io_br(); __io_br();
val = __le16_to_cpu(__raw_readw(addr)); val = __le16_to_cpu(__raw_readw(addr));
__io_ar(); __io_ar(val);
return val; return val;
} }
#endif #endif
...@@ -184,7 +184,7 @@ static inline u32 readl(const volatile void __iomem *addr) ...@@ -184,7 +184,7 @@ static inline u32 readl(const volatile void __iomem *addr)
__io_br(); __io_br();
val = __le32_to_cpu(__raw_readl(addr)); val = __le32_to_cpu(__raw_readl(addr));
__io_ar(); __io_ar(val);
return val; return val;
} }
#endif #endif
...@@ -198,7 +198,7 @@ static inline u64 readq(const volatile void __iomem *addr) ...@@ -198,7 +198,7 @@ static inline u64 readq(const volatile void __iomem *addr)
__io_br(); __io_br();
val = __le64_to_cpu(__raw_readq(addr)); val = __le64_to_cpu(__raw_readq(addr));
__io_ar(); __io_ar(val);
return val; return val;
} }
#endif #endif
...@@ -471,7 +471,7 @@ static inline u8 inb(unsigned long addr) ...@@ -471,7 +471,7 @@ static inline u8 inb(unsigned long addr)
__io_pbr(); __io_pbr();
val = __raw_readb(PCI_IOBASE + addr); val = __raw_readb(PCI_IOBASE + addr);
__io_par(); __io_par(val);
return val; return val;
} }
#endif #endif
...@@ -484,7 +484,7 @@ static inline u16 inw(unsigned long addr) ...@@ -484,7 +484,7 @@ static inline u16 inw(unsigned long addr)
__io_pbr(); __io_pbr();
val = __le16_to_cpu(__raw_readw(PCI_IOBASE + addr)); val = __le16_to_cpu(__raw_readw(PCI_IOBASE + addr));
__io_par(); __io_par(val);
return val; return val;
} }
#endif #endif
...@@ -497,7 +497,7 @@ static inline u32 inl(unsigned long addr) ...@@ -497,7 +497,7 @@ static inline u32 inl(unsigned long addr)
__io_pbr(); __io_pbr();
val = __le32_to_cpu(__raw_readl(PCI_IOBASE + addr)); val = __le32_to_cpu(__raw_readl(PCI_IOBASE + addr));
__io_par(); __io_par(val);
return val; return val;
} }
#endif #endif
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment