Commit ac8e3f30 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher

drm/amdgpu: remove RB1_BUSY bit checking

This is a workaround to let VCE soft reset work.
RB1_BUSY bit is always set, so remove its checking now, and we
will depend on RB0_BUSY currently.
After we find the root cause of RB1_BUSY, we can add it back.
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9c0171b4
......@@ -589,7 +589,11 @@ static int vce_v3_0_wait_for_idle(void *handle)
return -ETIMEDOUT;
}
#define AMDGPU_VCE_STATUS_BUSY_MASK 0x78
#define VCE_STATUS_VCPU_REPORT_AUTO_BUSY_MASK 0x00000008L /* AUTO_BUSY */
#define VCE_STATUS_VCPU_REPORT_RB0_BUSY_MASK 0x00000010L /* RB0_BUSY */
#define VCE_STATUS_VCPU_REPORT_RB1_BUSY_MASK 0x00000020L /* RB1_BUSY */
#define AMDGPU_VCE_STATUS_BUSY_MASK (VCE_STATUS_VCPU_REPORT_AUTO_BUSY_MASK | \
VCE_STATUS_VCPU_REPORT_RB0_BUSY_MASK)
static int vce_v3_0_check_soft_reset(void *handle)
{
......
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