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Commit accf94a1 authored by Dave Jiang's avatar Dave Jiang Committed by Russell King
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[ARM PATCH] 2447/1: IOP3xx PCI resource setup cleanup 

Patch from Dave Jiang

This cleans up the PCI mem and I/O resources assignments for all IOP
platforms. All addresses should be cleanly defined and correctly
assigned now.

Signed-off-by: Dave Jiang
Signed-off-by: Russell King
parent 81914426
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Showing with 40 additions and 52 deletions
arch/arm/mach-iop3xx/iop321-pci.c
View file @ accf94a1
......@@ -198,22 +198,23 @@ struct pci_bus *iop321_scan_bus(int nr, struct pci_sys_data *sys)
void iop321_init(void)
{
DBG("PCI: Intel 80321 PCI init code.\n");
DBG("\tATU: IOP321_ATUCMD=0x%04x\n", *IOP321_ATUCMD);
DBG("\tATU: IOP321_OMWTVR0=0x%04x, IOP321_OIOWTVR=0x%04x\n",
DBG("ATU: IOP321_ATUCMD=0x%04x\n", *IOP321_ATUCMD);
DBG("ATU: IOP321_OMWTVR0=0x%04x, IOP321_OIOWTVR=0x%04x\n",
*IOP321_OMWTVR0,
*IOP321_OIOWTVR);
DBG("\tATU: IOP321_ATUCR=0x%08x\n", *IOP321_ATUCR);
DBG("\tATU: IOP321_IABAR0=0x%08x IOP321_IALR0=0x%08x IOP321_IATVR0=%08x\n", *IOP321_IABAR0, *IOP321_IALR0, *IOP321_IATVR0);
DBG("\tATU: IOP321_ERBAR=0x%08x IOP321_ERLR=0x%08x IOP321_ERTVR=%08x\n", *IOP321_ERBAR, *IOP321_ERLR, *IOP321_ERTVR);
DBG("\tATU: IOP321_IABAR2=0x%08x IOP321_IALR2=0x%08x IOP321_IATVR2=%08x\n", *IOP321_IABAR2, *IOP321_IALR2, *IOP321_IATVR2);
DBG("\tATU: IOP321_IABAR3=0x%08x IOP321_IALR3=0x%08x IOP321_IATVR3=%08x\n", *IOP321_IABAR3, *IOP321_IALR3, *IOP321_IATVR3);
#if 0
hook_fault_code(4, iop321_pci_abort, SIGBUS, "external abort on linefetch");
hook_fault_code(6, iop321_pci_abort, SIGBUS, "external abort on linefetch");
hook_fault_code(8, iop321_pci_abort, SIGBUS, "external abort on non-linefetch");
hook_fault_code(10, iop321_pci_abort, SIGBUS, "external abort on non-linefetch");
#endif
DBG("ATU: IOP321_ATUCR=0x%08x\n", *IOP321_ATUCR);
DBG("ATU: IOP321_IABAR0=0x%08x IOP321_IALR0=0x%08x IOP321_IATVR0=%08x\n",
*IOP321_IABAR0, *IOP321_IALR0, *IOP321_IATVR0);
DBG("ATU: IOP321_OMWTVR0=0x%08x\n", *IOP321_OMWTVR0);
DBG("ATU: IOP321_IABAR1=0x%08x IOP321_IALR1=0x%08x\n",
*IOP321_IABAR1, *IOP321_IALR1);
DBG("ATU: IOP321_ERBAR=0x%08x IOP321_ERLR=0x%08x IOP321_ERTVR=%08x\n",
*IOP321_ERBAR, *IOP321_ERLR, *IOP321_ERTVR);
DBG("ATU: IOP321_IABAR2=0x%08x IOP321_IALR2=0x%08x IOP321_IATVR2=%08x\n",
*IOP321_IABAR2, *IOP321_IALR2, *IOP321_IATVR2);
DBG("ATU: IOP321_IABAR3=0x%08x IOP321_IALR3=0x%08x IOP321_IATVR3=%08x\n",
*IOP321_IABAR3, *IOP321_IALR3, *IOP321_IATVR3);
hook_fault_code(16+6, iop321_pci_abort, SIGBUS, "imprecise external abort");
}
arch/arm/mach-iop3xx/iq31244-pci.c
View file @ accf94a1
......@@ -78,13 +78,13 @@ static int iq31244_setup(int nr, struct pci_sys_data *sys)
memset(res, 0, sizeof(struct resource) * 2);
res[0].start = IOP321_PCI_LOWER_IO_BA + IOP321_PCI_IO_OFFSET;
res[0].end = IOP321_PCI_UPPER_IO_BA + IOP321_PCI_IO_OFFSET;
res[0].start = IOP321_PCI_LOWER_IO_VA;
res[0].end = IOP321_PCI_UPPER_IO_VA;
res[0].name = "IQ31244 PCI I/O Space";
res[0].flags = IORESOURCE_IO;
res[1].start = IOP321_PCI_LOWER_MEM_BA + IOP321_PCI_MEM_OFFSET;
res[1].end = IOP321_PCI_UPPER_MEM_BA + IOP321_PCI_MEM_OFFSET;
res[1].start = IOP321_PCI_LOWER_MEM_PA;
res[1].end = IOP321_PCI_UPPER_MEM_PA;
res[1].name = "IQ31244 PCI Memory Space";
res[1].flags = IORESOURCE_MEM;
......@@ -98,9 +98,6 @@ static int iq31244_setup(int nr, struct pci_sys_data *sys)
sys->resource[1] = &res[1];
sys->resource[2] = NULL;
iop3xx_pcibios_min_io = IOP321_PCI_LOWER_IO_VA;
iop3xx_pcibios_min_mem = IOP321_PCI_LOWER_MEM_VA;
return 1;
}
......
arch/arm/mach-iop3xx/iq80321-pci.c
View file @ accf94a1
......@@ -72,13 +72,13 @@ static int iq80321_setup(int nr, struct pci_sys_data *sys)
memset(res, 0, sizeof(struct resource) * 2);
res[0].start = IOP321_PCI_LOWER_IO_BA + IOP321_PCI_IO_OFFSET;
res[0].end = IOP321_PCI_UPPER_IO_BA + IOP321_PCI_IO_OFFSET;
res[0].start = IOP321_PCI_LOWER_IO_VA;
res[0].end = IOP321_PCI_UPPER_IO_VA;
res[0].name = "IQ80321 PCI I/O Space";
res[0].flags = IORESOURCE_IO;
res[1].start = IOP321_PCI_LOWER_MEM_BA + IOP321_PCI_MEM_OFFSET;
res[1].end = IOP321_PCI_UPPER_MEM_BA + IOP321_PCI_MEM_OFFSET;
res[1].start = IOP321_PCI_LOWER_MEM_PA;
res[1].end = IOP321_PCI_UPPER_MEM_PA;
res[1].name = "IQ80321 PCI Memory Space";
res[1].flags = IORESOURCE_MEM;
......@@ -92,9 +92,6 @@ static int iq80321_setup(int nr, struct pci_sys_data *sys)
sys->resource[1] = &res[1];
sys->resource[2] = NULL;
iop3xx_pcibios_min_io = IOP321_PCI_LOWER_IO_VA;
iop3xx_pcibios_min_mem = IOP321_PCI_LOWER_MEM_VA;
return 1;
}
......
arch/arm/mach-iop3xx/iq80331-pci.c
View file @ accf94a1
......@@ -68,13 +68,13 @@ static int iq80331_setup(int nr, struct pci_sys_data *sys)
memset(res, 0, sizeof(struct resource) * 2);
res[0].start = IOP331_PCI_LOWER_IO_BA + IOP331_PCI_IO_OFFSET;
res[0].end = IOP331_PCI_UPPER_IO_BA + IOP331_PCI_IO_OFFSET;
res[0].start = IOP331_PCI_LOWER_IO_VA;
res[0].end = IOP331_PCI_UPPER_IO_VA;
res[0].name = "IQ80331 PCI I/O Space";
res[0].flags = IORESOURCE_IO;
res[1].start = IOP331_PCI_LOWER_MEM_BA + IOP331_PCI_MEM_OFFSET;
res[1].end = IOP331_PCI_UPPER_MEM_BA + IOP331_PCI_MEM_OFFSET;
res[1].start = IOP331_PCI_LOWER_MEM_PA;
res[1].end = IOP331_PCI_UPPER_MEM_PA;
res[1].name = "IQ80331 PCI Memory Space";
res[1].flags = IORESOURCE_MEM;
......@@ -88,9 +88,6 @@ static int iq80331_setup(int nr, struct pci_sys_data *sys)
sys->resource[1] = &res[1];
sys->resource[2] = NULL;
iop3xx_pcibios_min_io = IOP331_PCI_LOWER_IO_VA;
iop3xx_pcibios_min_mem = IOP331_PCI_LOWER_MEM_VA;
return 1;
}
......
arch/arm/mach-iop3xx/iq80332-pci.c
View file @ accf94a1
......@@ -74,13 +74,13 @@ static int iq80332_setup(int nr, struct pci_sys_data *sys)
memset(res, 0, sizeof(struct resource) * 2);
res[0].start = IOP331_PCI_LOWER_IO_BA + IOP331_PCI_IO_OFFSET;
res[0].end = IOP331_PCI_UPPER_IO_BA + IOP331_PCI_IO_OFFSET;
res[0].start = IOP331_PCI_LOWER_IO_VA;
res[0].end = IOP331_PCI_UPPER_IO_VA;
res[0].name = "IQ80332 PCI I/O Space";
res[0].flags = IORESOURCE_IO;
res[1].start = IOP331_PCI_LOWER_MEM_BA + IOP331_PCI_MEM_OFFSET;
res[1].end = IOP331_PCI_UPPER_MEM_BA + IOP331_PCI_MEM_OFFSET;
res[1].start = IOP331_PCI_LOWER_MEM_PA;
res[1].end = IOP331_PCI_UPPER_MEM_PA;
res[1].name = "IQ80332 PCI Memory Space";
res[1].flags = IORESOURCE_MEM;
......@@ -94,9 +94,6 @@ static int iq80332_setup(int nr, struct pci_sys_data *sys)
sys->resource[1] = &res[1];
sys->resource[2] = NULL;
iop3xx_pcibios_min_io = IOP331_PCI_LOWER_IO_VA;
iop3xx_pcibios_min_mem = IOP331_PCI_LOWER_MEM_VA;
return 1;
}
......
include/asm-arm/arch-iop3xx/iop321.h
View file @ accf94a1
......@@ -31,7 +31,7 @@
/*
* IOP321 I/O and Mem space regions for PCI autoconfiguration
*/
#define IOP321_PCI_IO_WINDOW_SIZE 0x10000
#define IOP321_PCI_IO_WINDOW_SIZE 0x00010000
#define IOP321_PCI_LOWER_IO_PA 0x90000000
#define IOP321_PCI_LOWER_IO_VA 0xfe000000
#define IOP321_PCI_LOWER_IO_BA (*IOP321_OIOWTVR)
......@@ -40,14 +40,13 @@
#define IOP321_PCI_UPPER_IO_BA (IOP321_PCI_LOWER_IO_BA + IOP321_PCI_IO_WINDOW_SIZE - 1)
#define IOP321_PCI_IO_OFFSET (IOP321_PCI_LOWER_IO_VA - IOP321_PCI_LOWER_IO_BA)
#define IOP321_PCI_MEM_WINDOW_SIZE (~*IOP321_IALR1 + 1)
//#define IOP321_PCI_MEM_WINDOW_SIZE (~*IOP321_IALR1 + 1)
#define IOP321_PCI_MEM_WINDOW_SIZE 0x04000000 /* 64M outbound window */
#define IOP321_PCI_LOWER_MEM_PA 0x80000000
#define IOP321_PCI_LOWER_MEM_VA 0x80000000
#define IOP321_PCI_LOWER_MEM_BA (*IOP321_OMWTVR0)
#define IOP321_PCI_UPPER_MEM_PA (IOP321_PCI_LOWER_MEM_PA + IOP321_PCI_MEM_WINDOW_SIZE - 1)
#define IOP321_PCI_UPPER_MEM_VA (IOP321_PCI_LOWER_MEM_VA + IOP321_PCI_MEM_WINDOW_SIZE - 1)
#define IOP321_PCI_UPPER_MEM_BA (IOP321_PCI_LOWER_MEM_BA + IOP321_PCI_MEM_WINDOW_SIZE - 1)
#define IOP321_PCI_MEM_OFFSET (IOP321_PCI_LOWER_MEM_VA - IOP321_PCI_LOWER_MEM_BA)
#define IOP321_PCI_MEM_OFFSET (IOP321_PCI_LOWER_MEM_PA - IOP321_PCI_LOWER_MEM_BA)
/*
......
include/asm-arm/arch-iop3xx/iop331.h
View file @ accf94a1
......@@ -31,7 +31,7 @@
/*
* IOP331 I/O and Mem space regions for PCI autoconfiguration
*/
#define IOP331_PCI_IO_WINDOW_SIZE 0x10000
#define IOP331_PCI_IO_WINDOW_SIZE 0x00010000
#define IOP331_PCI_LOWER_IO_PA 0x90000000
#define IOP331_PCI_LOWER_IO_VA 0xfe000000
#define IOP331_PCI_LOWER_IO_BA (*IOP331_OIOWTVR)
......@@ -40,14 +40,14 @@
#define IOP331_PCI_UPPER_IO_BA (IOP331_PCI_LOWER_IO_BA + IOP331_PCI_IO_WINDOW_SIZE - 1)
#define IOP331_PCI_IO_OFFSET (IOP331_PCI_LOWER_IO_VA - IOP331_PCI_LOWER_IO_BA)
#define IOP331_PCI_MEM_WINDOW_SIZE (~*IOP331_IALR1 + 1)
/* this can be 128M if OMWTVR1 is set */
#define IOP331_PCI_MEM_WINDOW_SIZE 0x04000000 /* 64M outbound window */
//#define IOP331_PCI_MEM_WINDOW_SIZE (~*IOP331_IALR1 + 1)
#define IOP331_PCI_LOWER_MEM_PA 0x80000000
#define IOP331_PCI_LOWER_MEM_VA 0x80000000
#define IOP331_PCI_LOWER_MEM_BA (*IOP331_OMWTVR0)
#define IOP331_PCI_UPPER_MEM_PA (IOP331_PCI_LOWER_MEM_PA + IOP331_PCI_MEM_WINDOW_SIZE - 1)
#define IOP331_PCI_UPPER_MEM_VA (IOP331_PCI_LOWER_MEM_VA + IOP331_PCI_MEM_WINDOW_SIZE - 1)
#define IOP331_PCI_UPPER_MEM_BA (IOP331_PCI_LOWER_MEM_BA + IOP331_PCI_MEM_WINDOW_SIZE - 1)
#define IOP331_PCI_MEM_OFFSET (IOP331_PCI_LOWER_MEM_VA - IOP331_PCI_LOWER_MEM_BA)
#define IOP331_PCI_MEM_OFFSET (IOP331_PCI_LOWER_MEM_PA - IOP331_PCI_LOWER_MEM_BA)
/*
* IOP331 chipset registers
......
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