Commit adde42b5 authored by Alex Raimondi's avatar Alex Raimondi Committed by Haavard Skinnemoen

avr32: Allow reserving multiple pins at once

at32_reserve_pin now takes an u32 bitmask rather than a single pin.
This allows to reserve multiple pins at once.

Remove (undocumented) SDCS (pin PE26) from reservation in board
setup code.
Signed-off-by: default avatarAlex Raimondi <raimondi@miromico.ch>
Signed-off-by: default avatarHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
parent 45f92691
...@@ -287,23 +287,7 @@ static int __init atstk1002_init(void) ...@@ -287,23 +287,7 @@ static int __init atstk1002_init(void)
* ATSTK1000 uses 32-bit SDRAM interface. Reserve the * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
* SDRAM-specific pins so that nobody messes with them. * SDRAM-specific pins so that nobody messes with them.
*/ */
at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
#ifdef CONFIG_BOARD_ATSTK1006 #ifdef CONFIG_BOARD_ATSTK1006
smc_set_timing(&nand_config, &nand_timing); smc_set_timing(&nand_config, &nand_timing);
......
...@@ -131,23 +131,7 @@ static int __init atstk1003_init(void) ...@@ -131,23 +131,7 @@ static int __init atstk1003_init(void)
* ATSTK1000 uses 32-bit SDRAM interface. Reserve the * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
* SDRAM-specific pins so that nobody messes with them. * SDRAM-specific pins so that nobody messes with them.
*/ */
at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM #ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
at32_add_device_usart(1); at32_add_device_usart(1);
......
...@@ -307,23 +307,7 @@ static int __init favr32_init(void) ...@@ -307,23 +307,7 @@ static int __init favr32_init(void)
* Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific
* pins so that nobody messes with them. * pins so that nobody messes with them.
*/ */
at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
at32_select_gpio(GPIO_PIN_PB(3), 0); /* IRQ from ADS7843 */ at32_select_gpio(GPIO_PIN_PB(3), 0); /* IRQ from ADS7843 */
......
...@@ -211,4 +211,7 @@ ...@@ -211,4 +211,7 @@
#define ATMEL_LCDC_ALT_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_15B_DATA) #define ATMEL_LCDC_ALT_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_15B_DATA)
/* Bitmask for all EBI data (D16..D31) pins on port E */
#define ATMEL_EBI_PE_DATA_ALL (0x0000FFFF)
#endif /* __ASM_ARCH_AT32AP700X_H__ */ #endif /* __ASM_ARCH_AT32AP700X_H__ */
...@@ -25,6 +25,6 @@ void at32_select_periph(unsigned int port, unsigned int pin, ...@@ -25,6 +25,6 @@ void at32_select_periph(unsigned int port, unsigned int pin,
unsigned int periph, unsigned long flags); unsigned int periph, unsigned long flags);
void at32_select_gpio(unsigned int pin, unsigned long flags); void at32_select_gpio(unsigned int pin, unsigned long flags);
void at32_deselect_pin(unsigned int pin); void at32_deselect_pin(unsigned int pin);
void at32_reserve_pin(unsigned int pin); void at32_reserve_pin(unsigned int port, u32 pin_mask);
#endif /* __ASM_ARCH_PORTMUX_H__ */ #endif /* __ASM_ARCH_PORTMUX_H__ */
...@@ -167,22 +167,29 @@ void at32_deselect_pin(unsigned int pin) ...@@ -167,22 +167,29 @@ void at32_deselect_pin(unsigned int pin)
} }
/* Reserve a pin, preventing anyone else from changing its configuration. */ /* Reserve a pin, preventing anyone else from changing its configuration. */
void __init at32_reserve_pin(unsigned int pin) void __init at32_reserve_pin(unsigned int port, u32 pin_mask)
{ {
struct pio_device *pio; struct pio_device *pio;
unsigned int pin_index = pin & 0x1f;
pio = gpio_to_pio(pin); /* assign and verify pio */
pio = gpio_to_pio(port);
if (unlikely(!pio)) { if (unlikely(!pio)) {
printk("pio: invalid pin %u\n", pin); printk(KERN_WARNING "pio: invalid port %u\n", port);
goto fail; goto fail;
} }
if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) { /* Test if any of the requested pins is already muxed */
printk("%s: pin %u is busy\n", pio->name, pin_index); spin_lock(&pio_lock);
if (unlikely(pio->pinmux_mask & pin_mask)) {
printk(KERN_WARNING "%s: pin(s) busy (req. 0x%x, busy 0x%x)\n",
pio->name, pin_mask, pio->pinmux_mask & pin_mask);
spin_unlock(&pio_lock);
goto fail; goto fail;
} }
/* Reserve pins */
pio->pinmux_mask |= pin_mask;
spin_unlock(&pio_lock);
return; return;
fail: fail:
......
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