Commit ae3790b8 authored by Will Deacon's avatar Will Deacon Committed by Russell King

ARM: 7502/1: contextidr: avoid using bfi instruction during notifier

The bfi instruction is not available on ARMv6, so instead use an and/orr
sequence in the contextidr_notifier. This gets rid of the assembler
error:

  Assembler messages:
  Error: selected processor does not support ARM mode `bfi r3,r2,#0,#8'
Reported-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent dbece458
...@@ -63,10 +63,11 @@ static int contextidr_notifier(struct notifier_block *unused, unsigned long cmd, ...@@ -63,10 +63,11 @@ static int contextidr_notifier(struct notifier_block *unused, unsigned long cmd,
pid = task_pid_nr(thread->task) << ASID_BITS; pid = task_pid_nr(thread->task) << ASID_BITS;
asm volatile( asm volatile(
" mrc p15, 0, %0, c13, c0, 1\n" " mrc p15, 0, %0, c13, c0, 1\n"
" bfi %1, %0, #0, %2\n" " and %0, %0, %2\n"
" mcr p15, 0, %1, c13, c0, 1\n" " orr %0, %0, %1\n"
" mcr p15, 0, %0, c13, c0, 1\n"
: "=r" (contextidr), "+r" (pid) : "=r" (contextidr), "+r" (pid)
: "I" (ASID_BITS)); : "I" (~ASID_MASK));
isb(); isb();
return NOTIFY_OK; return NOTIFY_OK;
......
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