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Commit ae97988f authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
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drm/amd/powerplay: tidy up ret checks in amd_powerplay.c (v3) 

v2: squash in regression fix (Rex)
v3: Squash in regression fix (Rex)
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e5f23736
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Showing with 38 additions and 38 deletions
drivers/gpu/drm/amd/powerplay/amd_powerplay.c
View file @ ae97988f
......@@ -231,7 +231,7 @@ int amd_set_clockgating_by_smu(void *handle, uint32_t msg_id)
ret = pp_check(pp_handle);
if (ret != 0)
if (!ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -253,7 +253,7 @@ static int pp_set_powergating_state(void *handle,
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -380,7 +380,7 @@ static int pp_dpm_force_performance_level(void *handle,
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -415,7 +415,7 @@ static enum amd_dpm_forced_level pp_dpm_get_performance_level(
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -434,7 +434,7 @@ static uint32_t pp_dpm_get_sclk(void *handle, bool low)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -458,7 +458,7 @@ static uint32_t pp_dpm_get_mclk(void *handle, bool low)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -481,7 +481,7 @@ static void pp_dpm_powergate_vce(void *handle, bool gate)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return;
hwmgr = pp_handle->hwmgr;
......@@ -503,7 +503,7 @@ static void pp_dpm_powergate_uvd(void *handle, bool gate)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return;
hwmgr = pp_handle->hwmgr;
......@@ -525,7 +525,7 @@ static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
mutex_lock(&pp_handle->pp_lock);
......@@ -545,7 +545,7 @@ static enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -587,7 +587,7 @@ static void pp_dpm_set_fan_control_mode(void *handle, uint32_t mode)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return;
hwmgr = pp_handle->hwmgr;
......@@ -610,7 +610,7 @@ static uint32_t pp_dpm_get_fan_control_mode(void *handle)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -633,7 +633,7 @@ static int pp_dpm_set_fan_speed_percent(void *handle, uint32_t percent)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -656,7 +656,7 @@ static int pp_dpm_get_fan_speed_percent(void *handle, uint32_t *speed)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -680,7 +680,7 @@ static int pp_dpm_get_fan_speed_rpm(void *handle, uint32_t *rpm)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -702,7 +702,7 @@ static int pp_dpm_get_temperature(void *handle)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -727,7 +727,7 @@ static int pp_dpm_get_pp_num_states(void *handle,
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -772,7 +772,7 @@ static int pp_dpm_get_pp_table(void *handle, char **table)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -795,7 +795,7 @@ static int pp_dpm_set_pp_table(void *handle, const char *buf, size_t size)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -837,7 +837,7 @@ static int pp_dpm_force_clock_level(void *handle,
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -861,7 +861,7 @@ static int pp_dpm_print_clock_levels(void *handle,
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -884,7 +884,7 @@ static int pp_dpm_get_sclk_od(void *handle)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -907,7 +907,7 @@ static int pp_dpm_set_sclk_od(void *handle, uint32_t value)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -931,7 +931,7 @@ static int pp_dpm_get_mclk_od(void *handle)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -954,7 +954,7 @@ static int pp_dpm_set_mclk_od(void *handle, uint32_t value)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -978,7 +978,7 @@ static int pp_dpm_read_sensor(void *handle, int idx,
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -1004,7 +1004,7 @@ pp_dpm_get_vce_clock_state(void *handle, unsigned idx)
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return NULL;
hwmgr = pp_handle->hwmgr;
......@@ -1185,7 +1185,7 @@ int amd_powerplay_reset(void *handle)
int ret;
ret = pp_check(instance);
if (ret != 0)
if (!ret)
return ret;
ret = pp_hw_fini(instance);
......@@ -1210,7 +1210,7 @@ int amd_powerplay_display_configuration_change(void *handle,
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -1229,7 +1229,7 @@ int amd_powerplay_get_display_power_level(void *handle,
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -1254,7 +1254,7 @@ int amd_powerplay_get_current_clocks(void *handle,
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -1271,7 +1271,7 @@ int amd_powerplay_get_current_clocks(void *handle,
ret = phm_get_clock_info(hwmgr, &hwmgr->current_ps->hardware,
&hw_clocks, PHM_PerformanceLevelDesignation_Activity);
if (ret != 0) {
if (ret) {
pr_info("Error in phm_get_clock_info \n");
mutex_unlock(&pp_handle->pp_lock);
return -EINVAL;
......@@ -1305,7 +1305,7 @@ int amd_powerplay_get_clock_by_type(void *handle, enum amd_pp_clock_type type, s
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......@@ -1328,7 +1328,7 @@ int amd_powerplay_get_clock_by_type_with_latency(void *handle,
int ret = 0;
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
if (!clocks)
......@@ -1350,7 +1350,7 @@ int amd_powerplay_get_clock_by_type_with_voltage(void *handle,
int ret = 0;
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
if (!clocks)
......@@ -1374,7 +1374,7 @@ int amd_powerplay_set_watermarks_for_clocks_ranges(void *handle,
int ret = 0;
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
if (!wm_with_clock_ranges)
......@@ -1398,7 +1398,7 @@ int amd_powerplay_display_clock_voltage_request(void *handle,
int ret = 0;
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
if (!clock)
......@@ -1422,7 +1422,7 @@ int amd_powerplay_get_display_mode_validation_clocks(void *handle,
ret = pp_check(pp_handle);
if (ret != 0)
if (ret)
return ret;
hwmgr = pp_handle->hwmgr;
......
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