Commit af0e042e authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Chun-Kuang Hu

drm/mediatek: gamma: Add support for 12-bit LUT

New SoCs, like MT8195, not only may support bigger lookup tables, but
have got a different register layout to support bigger precision:
support specifying the number of `lut_bits` for each SoC and use it
in mtk_gamma_set_common() to perform the right calculations and add
support for 12-bit gamma lookup tables.

While at it, also reorder the variables in mtk_gamma_set_common()
and rename `lut_base` to `lut0_base` to improve readability.
Reviewed-by: default avatarJason-JH.Lin <jason-jh.lin@mediatek.com>
Reviewed-by: default avatarAlexandre Mergnat <amergnat@baylibre.com>
Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarCK Hu <ck.hu@mediatek.com>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20231012095736.100784-11-angelogioacchino.delregno@collabora.com/Signed-off-by: default avatarChun-Kuang Hu <chunkuang.hu@kernel.org>
parent 4708b01a
...@@ -26,17 +26,26 @@ ...@@ -26,17 +26,26 @@
#define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0) #define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0)
#define DISP_GAMMA_BANK 0x0100 #define DISP_GAMMA_BANK 0x0100
#define DISP_GAMMA_BANK_BANK GENMASK(1, 0) #define DISP_GAMMA_BANK_BANK GENMASK(1, 0)
#define DISP_GAMMA_BANK_DATA_MODE BIT(2)
#define DISP_GAMMA_LUT 0x0700 #define DISP_GAMMA_LUT 0x0700
#define DISP_GAMMA_LUT1 0x0b00
/* For 10 bit LUT layout, R/G/B are in the same register */
#define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20) #define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20)
#define DISP_GAMMA_LUT_10BIT_G GENMASK(19, 10) #define DISP_GAMMA_LUT_10BIT_G GENMASK(19, 10)
#define DISP_GAMMA_LUT_10BIT_B GENMASK(9, 0) #define DISP_GAMMA_LUT_10BIT_B GENMASK(9, 0)
/* For 12 bit LUT layout, R/G are in LUT, B is in LUT1 */
#define DISP_GAMMA_LUT_12BIT_R GENMASK(11, 0)
#define DISP_GAMMA_LUT_12BIT_G GENMASK(23, 12)
#define DISP_GAMMA_LUT_12BIT_B GENMASK(11, 0)
struct mtk_disp_gamma_data { struct mtk_disp_gamma_data {
bool has_dither; bool has_dither;
bool lut_diff; bool lut_diff;
u16 lut_bank_size; u16 lut_bank_size;
u16 lut_size; u16 lut_size;
u8 lut_bits;
}; };
/* /*
...@@ -72,28 +81,48 @@ unsigned int mtk_gamma_get_lut_size(struct device *dev) ...@@ -72,28 +81,48 @@ unsigned int mtk_gamma_get_lut_size(struct device *dev)
return 0; return 0;
} }
/*
* SoCs supporting 12-bits LUTs are using a new register layout that does
* always support (by HW) both 12-bits and 10-bits LUT but, on those, we
* ignore the support for 10-bits in this driver and always use 12-bits.
*
* Summarizing:
* - SoC HW support 9/10-bits LUT only
* - Old register layout
* - 10-bits LUT supported
* - 9-bits LUT not supported
* - SoC HW support both 10/12bits LUT
* - New register layout
* - 12-bits LUT supported
* - 10-its LUT not supported
*/
void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state) void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
{ {
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev); struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
unsigned int i; void __iomem *lut0_base = gamma->regs + DISP_GAMMA_LUT;
struct drm_color_lut *lut; void __iomem *lut1_base = gamma->regs + DISP_GAMMA_LUT1;
void __iomem *lut_base; u32 cfg_val, data_mode, lbank_val, word[2];
u32 cfg_val, lbank_val, word; u8 lut_bits = gamma->data->lut_bits;
int cur_bank, num_lut_banks; int cur_bank, num_lut_banks;
struct drm_color_lut *lut;
unsigned int i;
/* If there's no gamma lut there's nothing to do here. */ /* If there's no gamma lut there's nothing to do here. */
if (!state->gamma_lut) if (!state->gamma_lut)
return; return;
num_lut_banks = gamma->data->lut_size / gamma->data->lut_bank_size; num_lut_banks = gamma->data->lut_size / gamma->data->lut_bank_size;
lut_base = gamma->regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data; lut = (struct drm_color_lut *)state->gamma_lut->data;
/* Switch to 12 bits data mode if supported */
data_mode = FIELD_PREP(DISP_GAMMA_BANK_DATA_MODE, !!(lut_bits == 12));
for (cur_bank = 0; cur_bank < num_lut_banks; cur_bank++) { for (cur_bank = 0; cur_bank < num_lut_banks; cur_bank++) {
/* Switch gamma bank and set data mode before writing LUT */ /* Switch gamma bank and set data mode before writing LUT */
if (num_lut_banks > 1) { if (num_lut_banks > 1) {
lbank_val = FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank); lbank_val = FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank);
lbank_val |= data_mode;
writel(lbank_val, gamma->regs + DISP_GAMMA_BANK); writel(lbank_val, gamma->regs + DISP_GAMMA_BANK);
} }
...@@ -101,29 +130,43 @@ void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state) ...@@ -101,29 +130,43 @@ void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
int n = cur_bank * gamma->data->lut_bank_size + i; int n = cur_bank * gamma->data->lut_bank_size + i;
struct drm_color_lut diff, hwlut; struct drm_color_lut diff, hwlut;
hwlut.red = drm_color_lut_extract(lut[n].red, 10); hwlut.red = drm_color_lut_extract(lut[n].red, lut_bits);
hwlut.green = drm_color_lut_extract(lut[n].green, 10); hwlut.green = drm_color_lut_extract(lut[n].green, lut_bits);
hwlut.blue = drm_color_lut_extract(lut[n].blue, 10); hwlut.blue = drm_color_lut_extract(lut[n].blue, lut_bits);
if (!gamma->data->lut_diff || (i % 2 == 0)) { if (!gamma->data->lut_diff || (i % 2 == 0)) {
word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red); if (lut_bits == 12) {
word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green); word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, hwlut.red);
word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue); word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, hwlut.green);
word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, hwlut.blue);
} else {
word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
}
} else { } else {
diff.red = lut[n].red - lut[n - 1].red; diff.red = lut[n].red - lut[n - 1].red;
diff.red = drm_color_lut_extract(diff.red, 10); diff.red = drm_color_lut_extract(diff.red, lut_bits);
diff.green = lut[n].green - lut[n - 1].green; diff.green = lut[n].green - lut[n - 1].green;
diff.green = drm_color_lut_extract(diff.green, 10); diff.green = drm_color_lut_extract(diff.green, lut_bits);
diff.blue = lut[n].blue - lut[n - 1].blue; diff.blue = lut[n].blue - lut[n - 1].blue;
diff.blue = drm_color_lut_extract(diff.blue, 10); diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red); if (lut_bits == 12) {
word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green); word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, diff.red);
word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue); word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, diff.green);
word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, diff.blue);
} else {
word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
}
} }
writel(word, lut_base + i * 4); writel(word[0], lut0_base + i * 4);
if (lut_bits == 12)
writel(word[1], lut1_base + i * 4);
} }
} }
...@@ -229,11 +272,13 @@ static void mtk_disp_gamma_remove(struct platform_device *pdev) ...@@ -229,11 +272,13 @@ static void mtk_disp_gamma_remove(struct platform_device *pdev)
static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = { static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
.has_dither = true, .has_dither = true,
.lut_bank_size = 512, .lut_bank_size = 512,
.lut_bits = 10,
.lut_size = 512, .lut_size = 512,
}; };
static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = { static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
.lut_bank_size = 512, .lut_bank_size = 512,
.lut_bits = 10,
.lut_diff = true, .lut_diff = true,
.lut_size = 512, .lut_size = 512,
}; };
......
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