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Kirill Smelkov
linux
Commits
b006f041
Commit
b006f041
authored
Sep 14, 2004
by
Jeff Garzik
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[libata] minor comment updates, preparing for iomap merge
parent
7f5e5107
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2
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2 changed files
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13 additions
and
15 deletions
+13
-15
drivers/scsi/libata-core.c
drivers/scsi/libata-core.c
+13
-13
drivers/scsi/sata_nv.c
drivers/scsi/sata_nv.c
+0
-2
No files found.
drivers/scsi/libata-core.c
View file @
b006f041
...
...
@@ -68,11 +68,11 @@ MODULE_DESCRIPTION("Library module for ATA devices");
MODULE_LICENSE
(
"GPL"
);
/**
* ata_tf_load
_pio
- send taskfile registers to host controller
* ata_tf_load - send taskfile registers to host controller
* @ap: Port to which output is sent
* @tf: ATA taskfile register set
*
* Outputs ATA taskfile to standard ATA host controller
using PIO
.
* Outputs ATA taskfile to standard ATA host controller.
*
* LOCKING:
* Inherited from caller.
...
...
@@ -192,11 +192,11 @@ void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf)
}
/**
* ata_exec_command
_pio
- issue ATA command to host controller
* ata_exec_command - issue ATA command to host controller
* @ap: port to which command is being issued
* @tf: ATA taskfile register set
*
* Issues PIO write to ATA command register, with proper
* Issues PIO
/MMIO
write to ATA command register, with proper
* synchronization with interrupt handler / other threads.
*
* LOCKING:
...
...
@@ -245,7 +245,7 @@ void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf)
* @ap: port to which command is being issued
* @tf: ATA taskfile register set
*
* Issues PIO write to ATA command register, with proper
* Issues PIO
/MMIO
write to ATA command register, with proper
* synchronization with interrupt handler / other threads.
*
* LOCKING:
...
...
@@ -268,7 +268,7 @@ static inline void ata_exec(struct ata_port *ap, struct ata_taskfile *tf)
* @tf: ATA taskfile register set
*
* Issues ATA taskfile register set to ATA host controller,
*
via PIO,
with proper synchronization with interrupt handler and
* with proper synchronization with interrupt handler and
* other threads.
*
* LOCKING:
...
...
@@ -288,7 +288,7 @@ static void ata_tf_to_host(struct ata_port *ap, struct ata_taskfile *tf)
* @tf: ATA taskfile register set
*
* Issues ATA taskfile register set to ATA host controller,
*
via PIO,
with proper synchronization with interrupt handler and
* with proper synchronization with interrupt handler and
* other threads.
*
* LOCKING:
...
...
@@ -302,12 +302,12 @@ void ata_tf_to_host_nolock(struct ata_port *ap, struct ata_taskfile *tf)
}
/**
* ata_tf_read
_pio
- input device's ATA taskfile shadow registers
* ata_tf_read - input device's ATA taskfile shadow registers
* @ap: Port from which input is read
* @tf: ATA taskfile register set for storing input
*
* Reads ATA taskfile registers for currently-selected device
* into @tf
via PIO
.
* into @tf.
*
* LOCKING:
* Inherited from caller.
...
...
@@ -374,11 +374,11 @@ void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
}
/**
* ata_check_status
_pio
- Read device status reg & clear interrupt
* ata_check_status - Read device status reg & clear interrupt
* @ap: port where the device is
*
* Reads ATA taskfile status register for currently-selected device
*
via PIO
and return it's value. This also clears pending interrupts
* and return it's value. This also clears pending interrupts
* from this device
*
* LOCKING:
...
...
@@ -2637,7 +2637,7 @@ int ata_qc_issue_prot(struct ata_queued_cmd *qc)
}
/**
* ata_bmdma_setup
_mmio - Set up PCI IDE BMDMA transaction (MMIO)
* ata_bmdma_setup
- Set up PCI IDE BMDMA transaction
* @qc: Info associated with this ATA transaction.
*
* LOCKING:
...
...
@@ -2667,7 +2667,7 @@ static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
}
/**
* ata_bmdma_start
_mmio - Start a PCI IDE BMDMA transaction (MMIO)
* ata_bmdma_start
- Start a PCI IDE BMDMA transaction
* @qc: Info associated with this ATA transaction.
*
* LOCKING:
...
...
drivers/scsi/sata_nv.c
View file @
b006f041
...
...
@@ -50,8 +50,6 @@
#define NV_PIO_MASK 0x1f
#define NV_MWDMA_MASK 0x07
#define NV_UDMA_MASK 0x7f
#define NV_PORT0_BMDMA_REG_OFFSET 0x00
#define NV_PORT1_BMDMA_REG_OFFSET 0x08
#define NV_PORT0_SCR_REG_OFFSET 0x00
#define NV_PORT1_SCR_REG_OFFSET 0x40
...
...
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