Commit b00f938c authored by Rabin Vincent's avatar Rabin Vincent Committed by Dan Williams

dma40: fix DMA API usage for LLIs

Map and unmap the LLIs and use dma_sync_single_for_device() appropriately
instead of mapping and never unmapping them.
Acked-by: default avatarPer Forlin <per.forlin@stericsson.com>
Acked-by: default avatarJonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: default avatarRabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@stericsson.com>
Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent 026cbc42
...@@ -68,6 +68,7 @@ enum d40_command { ...@@ -68,6 +68,7 @@ enum d40_command {
* @base: Pointer to memory area when the pre_alloc_lli's are not large * @base: Pointer to memory area when the pre_alloc_lli's are not large
* enough, IE bigger than the most common case, 1 dst and 1 src. NULL if * enough, IE bigger than the most common case, 1 dst and 1 src. NULL if
* pre_alloc_lli is used. * pre_alloc_lli is used.
* @dma_addr: DMA address, if mapped
* @size: The size in bytes of the memory at base or the size of pre_alloc_lli. * @size: The size in bytes of the memory at base or the size of pre_alloc_lli.
* @pre_alloc_lli: Pre allocated area for the most common case of transfers, * @pre_alloc_lli: Pre allocated area for the most common case of transfers,
* one buffer to one buffer. * one buffer to one buffer.
...@@ -75,6 +76,7 @@ enum d40_command { ...@@ -75,6 +76,7 @@ enum d40_command {
struct d40_lli_pool { struct d40_lli_pool {
void *base; void *base;
int size; int size;
dma_addr_t dma_addr;
/* Space for dst and src, plus an extra for padding */ /* Space for dst and src, plus an extra for padding */
u8 pre_alloc_lli[3 * sizeof(struct d40_phy_lli)]; u8 pre_alloc_lli[3 * sizeof(struct d40_phy_lli)];
}; };
...@@ -329,7 +331,7 @@ static void __iomem *chan_base(struct d40_chan *chan) ...@@ -329,7 +331,7 @@ static void __iomem *chan_base(struct d40_chan *chan)
#define chan_err(d40c, format, arg...) \ #define chan_err(d40c, format, arg...) \
d40_err(chan2dev(d40c), format, ## arg) d40_err(chan2dev(d40c), format, ## arg)
static int d40_pool_lli_alloc(struct d40_desc *d40d, static int d40_pool_lli_alloc(struct d40_chan *d40c, struct d40_desc *d40d,
int lli_len, bool is_log) int lli_len, bool is_log)
{ {
u32 align; u32 align;
...@@ -358,17 +360,36 @@ static int d40_pool_lli_alloc(struct d40_desc *d40d, ...@@ -358,17 +360,36 @@ static int d40_pool_lli_alloc(struct d40_desc *d40d,
d40d->lli_log.src = PTR_ALIGN((struct d40_log_lli *) base, d40d->lli_log.src = PTR_ALIGN((struct d40_log_lli *) base,
align); align);
d40d->lli_log.dst = d40d->lli_log.src + lli_len; d40d->lli_log.dst = d40d->lli_log.src + lli_len;
d40d->lli_pool.dma_addr = 0;
} else { } else {
d40d->lli_phy.src = PTR_ALIGN((struct d40_phy_lli *)base, d40d->lli_phy.src = PTR_ALIGN((struct d40_phy_lli *)base,
align); align);
d40d->lli_phy.dst = d40d->lli_phy.src + lli_len; d40d->lli_phy.dst = d40d->lli_phy.src + lli_len;
d40d->lli_pool.dma_addr = dma_map_single(d40c->base->dev,
d40d->lli_phy.src,
d40d->lli_pool.size,
DMA_TO_DEVICE);
if (dma_mapping_error(d40c->base->dev,
d40d->lli_pool.dma_addr)) {
kfree(d40d->lli_pool.base);
d40d->lli_pool.base = NULL;
d40d->lli_pool.dma_addr = 0;
return -ENOMEM;
}
} }
return 0; return 0;
} }
static void d40_pool_lli_free(struct d40_desc *d40d) static void d40_pool_lli_free(struct d40_chan *d40c, struct d40_desc *d40d)
{ {
if (d40d->lli_pool.dma_addr)
dma_unmap_single(d40c->base->dev, d40d->lli_pool.dma_addr,
d40d->lli_pool.size, DMA_TO_DEVICE);
kfree(d40d->lli_pool.base); kfree(d40d->lli_pool.base);
d40d->lli_pool.base = NULL; d40d->lli_pool.base = NULL;
d40d->lli_pool.size = 0; d40d->lli_pool.size = 0;
...@@ -454,7 +475,7 @@ static struct d40_desc *d40_desc_get(struct d40_chan *d40c) ...@@ -454,7 +475,7 @@ static struct d40_desc *d40_desc_get(struct d40_chan *d40c)
list_for_each_entry_safe(d, _d, &d40c->client, node) list_for_each_entry_safe(d, _d, &d40c->client, node)
if (async_tx_test_ack(&d->txd)) { if (async_tx_test_ack(&d->txd)) {
d40_pool_lli_free(d); d40_pool_lli_free(d40c, d);
d40_desc_remove(d); d40_desc_remove(d);
desc = d; desc = d;
memset(desc, 0, sizeof(*desc)); memset(desc, 0, sizeof(*desc));
...@@ -474,6 +495,7 @@ static struct d40_desc *d40_desc_get(struct d40_chan *d40c) ...@@ -474,6 +495,7 @@ static struct d40_desc *d40_desc_get(struct d40_chan *d40c)
static void d40_desc_free(struct d40_chan *d40c, struct d40_desc *d40d) static void d40_desc_free(struct d40_chan *d40c, struct d40_desc *d40d)
{ {
d40_pool_lli_free(d40c, d40d);
d40_lcla_free_all(d40c, d40d); d40_lcla_free_all(d40c, d40d);
kmem_cache_free(d40c->base->desc_slab, d40d); kmem_cache_free(d40c->base->desc_slab, d40d);
} }
...@@ -1063,7 +1085,7 @@ static void dma_tasklet(unsigned long data) ...@@ -1063,7 +1085,7 @@ static void dma_tasklet(unsigned long data)
callback_param = d40d->txd.callback_param; callback_param = d40d->txd.callback_param;
if (async_tx_test_ack(&d40d->txd)) { if (async_tx_test_ack(&d40d->txd)) {
d40_pool_lli_free(d40d); d40_pool_lli_free(d40c, d40d);
d40_desc_remove(d40d); d40_desc_remove(d40d);
d40_desc_free(d40c, d40d); d40_desc_free(d40c, d40d);
} else { } else {
...@@ -1459,7 +1481,7 @@ static int d40_free_dma(struct d40_chan *d40c) ...@@ -1459,7 +1481,7 @@ static int d40_free_dma(struct d40_chan *d40c)
/* Release client owned descriptors */ /* Release client owned descriptors */
if (!list_empty(&d40c->client)) if (!list_empty(&d40c->client))
list_for_each_entry_safe(d, _d, &d40c->client, node) { list_for_each_entry_safe(d, _d, &d40c->client, node) {
d40_pool_lli_free(d); d40_pool_lli_free(d40c, d);
d40_desc_remove(d); d40_desc_remove(d);
d40_desc_free(d40c, d); d40_desc_free(d40c, d);
} }
...@@ -1633,7 +1655,7 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan, ...@@ -1633,7 +1655,7 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
if (chan_is_logical(d40c)) { if (chan_is_logical(d40c)) {
if (d40_pool_lli_alloc(d40d, d40d->lli_len, true) < 0) { if (d40_pool_lli_alloc(d40c, d40d, d40d->lli_len, true) < 0) {
chan_err(d40c, "Out of memory\n"); chan_err(d40c, "Out of memory\n");
goto err; goto err;
} }
...@@ -1652,7 +1674,7 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan, ...@@ -1652,7 +1674,7 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
d40c->dma_cfg.dst_info.data_width, d40c->dma_cfg.dst_info.data_width,
d40c->dma_cfg.src_info.data_width); d40c->dma_cfg.src_info.data_width);
} else { } else {
if (d40_pool_lli_alloc(d40d, d40d->lli_len, false) < 0) { if (d40_pool_lli_alloc(d40c, d40d, d40d->lli_len, false) < 0) {
chan_err(d40c, "Out of memory\n"); chan_err(d40c, "Out of memory\n");
goto err; goto err;
} }
...@@ -1683,8 +1705,9 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan, ...@@ -1683,8 +1705,9 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
if (res < 0) if (res < 0)
goto err; goto err;
(void) dma_map_single(d40c->base->dev, d40d->lli_phy.src, dma_sync_single_for_device(d40c->base->dev,
d40d->lli_pool.size, DMA_TO_DEVICE); d40d->lli_pool.dma_addr,
d40d->lli_pool.size, DMA_TO_DEVICE);
} }
dma_async_tx_descriptor_init(&d40d->txd, chan); dma_async_tx_descriptor_init(&d40d->txd, chan);
...@@ -1876,7 +1899,7 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan, ...@@ -1876,7 +1899,7 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan,
if (chan_is_logical(d40c)) { if (chan_is_logical(d40c)) {
if (d40_pool_lli_alloc(d40d, d40d->lli_len, true) < 0) { if (d40_pool_lli_alloc(d40c,d40d, d40d->lli_len, true) < 0) {
chan_err(d40c, "Out of memory\n"); chan_err(d40c, "Out of memory\n");
goto err; goto err;
} }
...@@ -1902,7 +1925,7 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan, ...@@ -1902,7 +1925,7 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan,
} else { } else {
if (d40_pool_lli_alloc(d40d, d40d->lli_len, false) < 0) { if (d40_pool_lli_alloc(d40c, d40d, d40d->lli_len, false) < 0) {
chan_err(d40c, "Out of memory\n"); chan_err(d40c, "Out of memory\n");
goto err; goto err;
} }
...@@ -1931,8 +1954,9 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan, ...@@ -1931,8 +1954,9 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan,
false) == NULL) false) == NULL)
goto err; goto err;
(void) dma_map_single(d40c->base->dev, d40d->lli_phy.src, dma_sync_single_for_device(d40c->base->dev,
d40d->lli_pool.size, DMA_TO_DEVICE); d40d->lli_pool.dma_addr,
d40d->lli_pool.size, DMA_TO_DEVICE);
} }
spin_unlock_irqrestore(&d40c->lock, flags); spin_unlock_irqrestore(&d40c->lock, flags);
...@@ -1975,7 +1999,7 @@ static int d40_prep_slave_sg_log(struct d40_desc *d40d, ...@@ -1975,7 +1999,7 @@ static int d40_prep_slave_sg_log(struct d40_desc *d40d,
return -EINVAL; return -EINVAL;
} }
if (d40_pool_lli_alloc(d40d, d40d->lli_len, true) < 0) { if (d40_pool_lli_alloc(d40c, d40d, d40d->lli_len, true) < 0) {
chan_err(d40c, "Out of memory\n"); chan_err(d40c, "Out of memory\n");
return -ENOMEM; return -ENOMEM;
} }
...@@ -2029,7 +2053,7 @@ static int d40_prep_slave_sg_phy(struct d40_desc *d40d, ...@@ -2029,7 +2053,7 @@ static int d40_prep_slave_sg_phy(struct d40_desc *d40d,
return -EINVAL; return -EINVAL;
} }
if (d40_pool_lli_alloc(d40d, d40d->lli_len, false) < 0) { if (d40_pool_lli_alloc(d40c, d40d, d40d->lli_len, false) < 0) {
chan_err(d40c, "Out of memory\n"); chan_err(d40c, "Out of memory\n");
return -ENOMEM; return -ENOMEM;
} }
...@@ -2075,8 +2099,8 @@ static int d40_prep_slave_sg_phy(struct d40_desc *d40d, ...@@ -2075,8 +2099,8 @@ static int d40_prep_slave_sg_phy(struct d40_desc *d40d,
if (res < 0) if (res < 0)
return res; return res;
(void) dma_map_single(d40c->base->dev, d40d->lli_phy.src, dma_sync_single_for_device(d40c->base->dev, d40d->lli_pool.dma_addr,
d40d->lli_pool.size, DMA_TO_DEVICE); d40d->lli_pool.size, DMA_TO_DEVICE);
return 0; return 0;
} }
......
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