Commit b09e789c authored by Shaohua Li's avatar Shaohua Li Committed by Tony Luck

[IA64] forbid ptrace changes psr.ri to 3

The "ri" field in the processor status register only has defined
values of 0, 1, 2.  Do not let ptrace set this to 3.  As with
other reserved fields in registers we silently discard the value.
Signed-off-by: default avatarShaohua Li <shaohua.li@intel.com>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
parent e8c59c0c
...@@ -951,10 +951,14 @@ access_uarea (struct task_struct *child, unsigned long addr, ...@@ -951,10 +951,14 @@ access_uarea (struct task_struct *child, unsigned long addr,
return 0; return 0;
case PT_CR_IPSR: case PT_CR_IPSR:
if (write_access) if (write_access) {
pt->cr_ipsr = ((*data & IPSR_MASK) unsigned long tmp = *data;
/* psr.ri==3 is a reserved value: SDM 2:25 */
if ((tmp & IA64_PSR_RI) == IA64_PSR_RI)
tmp &= ~IA64_PSR_RI;
pt->cr_ipsr = ((tmp & IPSR_MASK)
| (pt->cr_ipsr & ~IPSR_MASK)); | (pt->cr_ipsr & ~IPSR_MASK));
else } else
*data = (pt->cr_ipsr & IPSR_MASK); *data = (pt->cr_ipsr & IPSR_MASK);
return 0; return 0;
......
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