Commit b1669c9f authored by Netanel Belgazal's avatar Netanel Belgazal Committed by David S. Miller

net/ena: use napi_complete_done() return value

Do not unamsk interrupts if we are in busy poll mode.
Signed-off-by: default avatarNetanel Belgazal <netanel@annapurnalabs.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3f6159db
...@@ -1122,26 +1122,40 @@ static int ena_io_poll(struct napi_struct *napi, int budget) ...@@ -1122,26 +1122,40 @@ static int ena_io_poll(struct napi_struct *napi, int budget)
tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget); tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget); rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
if ((budget > rx_work_done) && (tx_budget > tx_work_done)) { /* If the device is about to reset or down, avoid unmask
napi_complete_done(napi, rx_work_done); * the interrupt and return 0 so NAPI won't reschedule
*/
if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) {
napi_complete_done(napi, 0);
ret = 0;
} else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
napi_comp_call = 1; napi_comp_call = 1;
/* Update numa and unmask the interrupt only when schedule
* from the interrupt context (vs from sk_busy_loop)
*/
if (napi_complete_done(napi, rx_work_done)) {
/* Tx and Rx share the same interrupt vector */ /* Tx and Rx share the same interrupt vector */
if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev)) if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
ena_adjust_intr_moderation(rx_ring, tx_ring); ena_adjust_intr_moderation(rx_ring, tx_ring);
/* Update intr register: rx intr delay, tx intr delay and /* Update intr register: rx intr delay,
* interrupt unmask * tx intr delay and interrupt unmask
*/ */
ena_com_update_intr_reg(&intr_reg, ena_com_update_intr_reg(&intr_reg,
rx_ring->smoothed_interval, rx_ring->smoothed_interval,
tx_ring->smoothed_interval, tx_ring->smoothed_interval,
true); true);
/* It is a shared MSI-X. Tx and Rx CQ have pointer to it. /* It is a shared MSI-X.
* Tx and Rx CQ have pointer to it.
* So we use one of them to reach the intr reg * So we use one of them to reach the intr reg
*/ */
ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg); ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg);
}
ena_update_ring_numa_node(tx_ring, rx_ring); ena_update_ring_numa_node(tx_ring, rx_ring);
......
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