Commit b1914cb2 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm/radeon/kms: fix segfault in pm rework
  drm/radeon/kms: fix up gpio i2c mask bits for r4xx
  drm/radeon: add some missing FireMV pci ids
  vgaarb: a NULL bridge is acceptable for root devices.
  drm: Remove utterly bogus preempt_disable() sections
parents ea4039a3 6991b8f2
...@@ -110,10 +110,7 @@ static void vblank_disable_and_save(struct drm_device *dev, int crtc) ...@@ -110,10 +110,7 @@ static void vblank_disable_and_save(struct drm_device *dev, int crtc)
/* Prevent vblank irq processing while disabling vblank irqs, /* Prevent vblank irq processing while disabling vblank irqs,
* so no updates of timestamps or count can happen after we've * so no updates of timestamps or count can happen after we've
* disabled. Needed to prevent races in case of delayed irq's. * disabled. Needed to prevent races in case of delayed irq's.
* Disable preemption, so vblank_time_lock is held as short as
* possible, even under a kernel with PREEMPT_RT patches.
*/ */
preempt_disable();
spin_lock_irqsave(&dev->vblank_time_lock, irqflags); spin_lock_irqsave(&dev->vblank_time_lock, irqflags);
dev->driver->disable_vblank(dev, crtc); dev->driver->disable_vblank(dev, crtc);
...@@ -164,7 +161,6 @@ static void vblank_disable_and_save(struct drm_device *dev, int crtc) ...@@ -164,7 +161,6 @@ static void vblank_disable_and_save(struct drm_device *dev, int crtc)
clear_vblank_timestamps(dev, crtc); clear_vblank_timestamps(dev, crtc);
spin_unlock_irqrestore(&dev->vblank_time_lock, irqflags); spin_unlock_irqrestore(&dev->vblank_time_lock, irqflags);
preempt_enable();
} }
static void vblank_disable_fn(unsigned long arg) static void vblank_disable_fn(unsigned long arg)
...@@ -889,10 +885,6 @@ int drm_vblank_get(struct drm_device *dev, int crtc) ...@@ -889,10 +885,6 @@ int drm_vblank_get(struct drm_device *dev, int crtc)
spin_lock_irqsave(&dev->vbl_lock, irqflags); spin_lock_irqsave(&dev->vbl_lock, irqflags);
/* Going from 0->1 means we have to enable interrupts again */ /* Going from 0->1 means we have to enable interrupts again */
if (atomic_add_return(1, &dev->vblank_refcount[crtc]) == 1) { if (atomic_add_return(1, &dev->vblank_refcount[crtc]) == 1) {
/* Disable preemption while holding vblank_time_lock. Do
* it explicitely to guard against PREEMPT_RT kernel.
*/
preempt_disable();
spin_lock_irqsave(&dev->vblank_time_lock, irqflags2); spin_lock_irqsave(&dev->vblank_time_lock, irqflags2);
if (!dev->vblank_enabled[crtc]) { if (!dev->vblank_enabled[crtc]) {
/* Enable vblank irqs under vblank_time_lock protection. /* Enable vblank irqs under vblank_time_lock protection.
...@@ -912,7 +904,6 @@ int drm_vblank_get(struct drm_device *dev, int crtc) ...@@ -912,7 +904,6 @@ int drm_vblank_get(struct drm_device *dev, int crtc)
} }
} }
spin_unlock_irqrestore(&dev->vblank_time_lock, irqflags2); spin_unlock_irqrestore(&dev->vblank_time_lock, irqflags2);
preempt_enable();
} else { } else {
if (!dev->vblank_enabled[crtc]) { if (!dev->vblank_enabled[crtc]) {
atomic_dec(&dev->vblank_refcount[crtc]); atomic_dec(&dev->vblank_refcount[crtc]);
......
...@@ -85,6 +85,18 @@ static struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_device *rd ...@@ -85,6 +85,18 @@ static struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_device *rd
for (i = 0; i < num_indices; i++) { for (i = 0; i < num_indices; i++) {
gpio = &i2c_info->asGPIO_Info[i]; gpio = &i2c_info->asGPIO_Info[i];
/* r4xx mask is technically not used by the hw, so patch in the legacy mask bits */
if ((rdev->family == CHIP_R420) ||
(rdev->family == CHIP_R423) ||
(rdev->family == CHIP_RV410)) {
if ((le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0018) ||
(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0019) ||
(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x001a)) {
gpio->ucClkMaskShift = 0x19;
gpio->ucDataMaskShift = 0x18;
}
}
/* some evergreen boards have bad data for this entry */ /* some evergreen boards have bad data for this entry */
if (ASIC_IS_DCE4(rdev)) { if (ASIC_IS_DCE4(rdev)) {
if ((i == 7) && if ((i == 7) &&
...@@ -1996,14 +2008,14 @@ static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev) ...@@ -1996,14 +2008,14 @@ static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev)
return state_index; return state_index;
/* last mode is usually default, array is low to high */ /* last mode is usually default, array is low to high */
for (i = 0; i < num_modes; i++) { for (i = 0; i < num_modes; i++) {
rdev->pm.power_state[state_index].clock_info =
kzalloc(sizeof(struct radeon_pm_clock_info) * 1, GFP_KERNEL);
if (!rdev->pm.power_state[state_index].clock_info)
return state_index;
rdev->pm.power_state[state_index].num_clock_modes = 1;
rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE;
switch (frev) { switch (frev) {
case 1: case 1:
rdev->pm.power_state[state_index].clock_info =
kzalloc(sizeof(struct radeon_pm_clock_info) * 1, GFP_KERNEL);
if (!rdev->pm.power_state[state_index].clock_info)
return state_index;
rdev->pm.power_state[state_index].num_clock_modes = 1;
rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->pm.power_state[state_index].clock_info[0].mclk =
le16_to_cpu(power_info->info.asPowerPlayInfo[i].usMemoryClock); le16_to_cpu(power_info->info.asPowerPlayInfo[i].usMemoryClock);
rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->pm.power_state[state_index].clock_info[0].sclk =
...@@ -2039,11 +2051,6 @@ static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev) ...@@ -2039,11 +2051,6 @@ static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev)
state_index++; state_index++;
break; break;
case 2: case 2:
rdev->pm.power_state[state_index].clock_info =
kzalloc(sizeof(struct radeon_pm_clock_info) * 1, GFP_KERNEL);
if (!rdev->pm.power_state[state_index].clock_info)
return state_index;
rdev->pm.power_state[state_index].num_clock_modes = 1;
rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->pm.power_state[state_index].clock_info[0].mclk =
le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMemoryClock); le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMemoryClock);
rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->pm.power_state[state_index].clock_info[0].sclk =
...@@ -2080,11 +2087,6 @@ static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev) ...@@ -2080,11 +2087,6 @@ static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev)
state_index++; state_index++;
break; break;
case 3: case 3:
rdev->pm.power_state[state_index].clock_info =
kzalloc(sizeof(struct radeon_pm_clock_info) * 1, GFP_KERNEL);
if (!rdev->pm.power_state[state_index].clock_info)
return state_index;
rdev->pm.power_state[state_index].num_clock_modes = 1;
rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->pm.power_state[state_index].clock_info[0].mclk =
le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMemoryClock); le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMemoryClock);
rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->pm.power_state[state_index].clock_info[0].sclk =
......
...@@ -465,31 +465,29 @@ static void vga_arbiter_check_bridge_sharing(struct vga_device *vgadev) ...@@ -465,31 +465,29 @@ static void vga_arbiter_check_bridge_sharing(struct vga_device *vgadev)
while (new_bus) { while (new_bus) {
new_bridge = new_bus->self; new_bridge = new_bus->self;
if (new_bridge) { /* go through list of devices already registered */
/* go through list of devices already registered */ list_for_each_entry(same_bridge_vgadev, &vga_list, list) {
list_for_each_entry(same_bridge_vgadev, &vga_list, list) { bus = same_bridge_vgadev->pdev->bus;
bus = same_bridge_vgadev->pdev->bus; bridge = bus->self;
bridge = bus->self;
/* see if the share a bridge with this device */
/* see if the share a bridge with this device */ if (new_bridge == bridge) {
if (new_bridge == bridge) { /* if their direct parent bridge is the same
/* if their direct parent bridge is the same as any bridge of this device then it can't be used
as any bridge of this device then it can't be used for that device */
for that device */ same_bridge_vgadev->bridge_has_one_vga = false;
same_bridge_vgadev->bridge_has_one_vga = false; }
}
/* now iterate the previous devices bridge hierarchy */ /* now iterate the previous devices bridge hierarchy */
/* if the new devices parent bridge is in the other devices /* if the new devices parent bridge is in the other devices
hierarchy then we can't use it to control this device */ hierarchy then we can't use it to control this device */
while (bus) { while (bus) {
bridge = bus->self; bridge = bus->self;
if (bridge) { if (bridge) {
if (bridge == vgadev->pdev->bus->self) if (bridge == vgadev->pdev->bus->self)
vgadev->bridge_has_one_vga = false; vgadev->bridge_has_one_vga = false;
}
bus = bus->parent;
} }
bus = bus->parent;
} }
} }
new_bus = new_bus->parent; new_bus = new_bus->parent;
......
...@@ -4,6 +4,7 @@ ...@@ -4,6 +4,7 @@
*/ */
#define radeon_PCI_IDS \ #define radeon_PCI_IDS \
{0x1002, 0x3150, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ {0x1002, 0x3150, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \
{0x1002, 0x3151, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
{0x1002, 0x3152, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ {0x1002, 0x3152, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
{0x1002, 0x3154, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ {0x1002, 0x3154, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
{0x1002, 0x3155, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ {0x1002, 0x3155, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
...@@ -55,6 +56,7 @@ ...@@ -55,6 +56,7 @@
{0x1002, 0x4C64, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|RADEON_IS_MOBILITY}, \ {0x1002, 0x4C64, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|RADEON_IS_MOBILITY}, \
{0x1002, 0x4C66, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|RADEON_IS_MOBILITY}, \ {0x1002, 0x4C66, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|RADEON_IS_MOBILITY}, \
{0x1002, 0x4C67, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|RADEON_IS_MOBILITY}, \ {0x1002, 0x4C67, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|RADEON_IS_MOBILITY}, \
{0x1002, 0x4C6E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|RADEON_IS_MOBILITY}, \
{0x1002, 0x4E44, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ {0x1002, 0x4E44, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \
{0x1002, 0x4E45, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ {0x1002, 0x4E45, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \
{0x1002, 0x4E46, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ {0x1002, 0x4E46, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \
......
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