Commit b1c8e1e2 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher

drm/amd/powerplay: add pp_table_version in hwmgr.

Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarEdward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e1aa5715
...@@ -67,6 +67,7 @@ int hwmgr_init(struct amd_pp_init *pp_init, struct pp_instance *handle) ...@@ -67,6 +67,7 @@ int hwmgr_init(struct amd_pp_init *pp_init, struct pp_instance *handle)
hwmgr->chip_id = pp_init->chip_id; hwmgr->chip_id = pp_init->chip_id;
hwmgr->usec_timeout = AMD_MAX_USEC_TIMEOUT; hwmgr->usec_timeout = AMD_MAX_USEC_TIMEOUT;
hwmgr->power_source = PP_PowerSource_AC; hwmgr->power_source = PP_PowerSource_AC;
hwmgr->pp_table_version = PP_TABLE_V1;
hwmgr_init_default_caps(hwmgr); hwmgr_init_default_caps(hwmgr);
hwmgr_set_user_specify_caps(hwmgr); hwmgr_set_user_specify_caps(hwmgr);
......
...@@ -599,6 +599,13 @@ enum PP_VCE_LEVEL { ...@@ -599,6 +599,13 @@ enum PP_VCE_LEVEL {
}; };
enum PP_TABLE_VERSION {
PP_TABLE_V0 = 0,
PP_TABLE_V1,
PP_TABLE_V2,
PP_TABLE_MAX
};
/** /**
* The main hardware manager structure. * The main hardware manager structure.
*/ */
...@@ -606,6 +613,7 @@ struct pp_hwmgr { ...@@ -606,6 +613,7 @@ struct pp_hwmgr {
uint32_t chip_family; uint32_t chip_family;
uint32_t chip_id; uint32_t chip_id;
uint32_t pp_table_version;
void *device; void *device;
struct pp_smumgr *smumgr; struct pp_smumgr *smumgr;
const void *soft_pp_table; const void *soft_pp_table;
......
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