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Commit b1dd3ca2 authored by Sascha Hauer's avatar Sascha Hauer Committed by Boris Brezillon
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mtd: nand: convert ONFI mode into data interface 

struct nand_data_interface is the designated type to pass to
the NAND drivers to configure the timing. To simplify further
patches convert the onfi_sdr_timings array from type struct
nand_sdr_timings nand_data_interface.
Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
parent eee64b70
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Showing with 224 additions and 206 deletions
drivers/mtd/nand/nand_timings.c
View file @ b1dd3ca2
...@@ -13,228 +13,246 @@ ...@@ -13,228 +13,246 @@
#include <linux/export.h> #include <linux/export.h>
#include <linux/mtd/nand.h> #include <linux/mtd/nand.h>
static const struct nand_sdr_timings onfi_sdr_timings[] = { static const struct nand_data_interface onfi_sdr_timings[] = {
/* Mode 0 */ /* Mode 0 */
{ {
.tADL_min = 400000, .type = NAND_SDR_IFACE,
.tALH_min = 20000, .timings.sdr = {
.tALS_min = 50000, .tADL_min = 400000,
.tAR_min = 25000, .tALH_min = 20000,
.tCEA_max = 100000, .tALS_min = 50000,
.tCEH_min = 20000, .tAR_min = 25000,
.tCH_min = 20000, .tCEA_max = 100000,
.tCHZ_max = 100000, .tCEH_min = 20000,
.tCLH_min = 20000, .tCH_min = 20000,
.tCLR_min = 20000, .tCHZ_max = 100000,
.tCLS_min = 50000, .tCLH_min = 20000,
.tCOH_min = 0, .tCLR_min = 20000,
.tCS_min = 70000, .tCLS_min = 50000,
.tDH_min = 20000, .tCOH_min = 0,
.tDS_min = 40000, .tCS_min = 70000,
.tFEAT_max = 1000000, .tDH_min = 20000,
.tIR_min = 10000, .tDS_min = 40000,
.tITC_max = 1000000, .tFEAT_max = 1000000,
.tRC_min = 100000, .tIR_min = 10000,
.tREA_max = 40000, .tITC_max = 1000000,
.tREH_min = 30000, .tRC_min = 100000,
.tRHOH_min = 0, .tREA_max = 40000,
.tRHW_min = 200000, .tREH_min = 30000,
.tRHZ_max = 200000, .tRHOH_min = 0,
.tRLOH_min = 0, .tRHW_min = 200000,
.tRP_min = 50000, .tRHZ_max = 200000,
.tRR_min = 40000, .tRLOH_min = 0,
.tRST_max = 250000000000ULL, .tRP_min = 50000,
.tWB_max = 200000, .tRR_min = 40000,
.tWC_min = 100000, .tRST_max = 250000000000ULL,
.tWH_min = 30000, .tWB_max = 200000,
.tWHR_min = 120000, .tWC_min = 100000,
.tWP_min = 50000, .tWH_min = 30000,
.tWW_min = 100000, .tWHR_min = 120000,
.tWP_min = 50000,
.tWW_min = 100000,
},
}, },
/* Mode 1 */ /* Mode 1 */
{ {
.tADL_min = 400000, .type = NAND_SDR_IFACE,
.tALH_min = 10000, .timings.sdr = {
.tALS_min = 25000, .tADL_min = 400000,
.tAR_min = 10000, .tALH_min = 10000,
.tCEA_max = 45000, .tALS_min = 25000,
.tCEH_min = 20000, .tAR_min = 10000,
.tCH_min = 10000, .tCEA_max = 45000,
.tCHZ_max = 50000, .tCEH_min = 20000,
.tCLH_min = 10000, .tCH_min = 10000,
.tCLR_min = 10000, .tCHZ_max = 50000,
.tCLS_min = 25000, .tCLH_min = 10000,
.tCOH_min = 15000, .tCLR_min = 10000,
.tCS_min = 35000, .tCLS_min = 25000,
.tDH_min = 10000, .tCOH_min = 15000,
.tDS_min = 20000, .tCS_min = 35000,
.tFEAT_max = 1000000, .tDH_min = 10000,
.tIR_min = 0, .tDS_min = 20000,
.tITC_max = 1000000, .tFEAT_max = 1000000,
.tRC_min = 50000, .tIR_min = 0,
.tREA_max = 30000, .tITC_max = 1000000,
.tREH_min = 15000, .tRC_min = 50000,
.tRHOH_min = 15000, .tREA_max = 30000,
.tRHW_min = 100000, .tREH_min = 15000,
.tRHZ_max = 100000, .tRHOH_min = 15000,
.tRLOH_min = 0, .tRHW_min = 100000,
.tRP_min = 25000, .tRHZ_max = 100000,
.tRR_min = 20000, .tRLOH_min = 0,
.tRST_max = 500000000, .tRP_min = 25000,
.tWB_max = 100000, .tRR_min = 20000,
.tWC_min = 45000, .tRST_max = 500000000,
.tWH_min = 15000, .tWB_max = 100000,
.tWHR_min = 80000, .tWC_min = 45000,
.tWP_min = 25000, .tWH_min = 15000,
.tWW_min = 100000, .tWHR_min = 80000,
.tWP_min = 25000,
.tWW_min = 100000,
},
}, },
/* Mode 2 */ /* Mode 2 */
{ {
.tADL_min = 400000, .type = NAND_SDR_IFACE,
.tALH_min = 10000, .timings.sdr = {
.tALS_min = 15000, .tADL_min = 400000,
.tAR_min = 10000, .tALH_min = 10000,
.tCEA_max = 30000, .tALS_min = 15000,
.tCEH_min = 20000, .tAR_min = 10000,
.tCH_min = 10000, .tCEA_max = 30000,
.tCHZ_max = 50000, .tCEH_min = 20000,
.tCLH_min = 10000, .tCH_min = 10000,
.tCLR_min = 10000, .tCHZ_max = 50000,
.tCLS_min = 15000, .tCLH_min = 10000,
.tCOH_min = 15000, .tCLR_min = 10000,
.tCS_min = 25000, .tCLS_min = 15000,
.tDH_min = 5000, .tCOH_min = 15000,
.tDS_min = 15000, .tCS_min = 25000,
.tFEAT_max = 1000000, .tDH_min = 5000,
.tIR_min = 0, .tDS_min = 15000,
.tITC_max = 1000000, .tFEAT_max = 1000000,
.tRC_min = 35000, .tIR_min = 0,
.tREA_max = 25000, .tITC_max = 1000000,
.tREH_min = 15000, .tRC_min = 35000,
.tRHOH_min = 15000, .tREA_max = 25000,
.tRHW_min = 100000, .tREH_min = 15000,
.tRHZ_max = 100000, .tRHOH_min = 15000,
.tRLOH_min = 0, .tRHW_min = 100000,
.tRR_min = 20000, .tRHZ_max = 100000,
.tRST_max = 500000000, .tRLOH_min = 0,
.tWB_max = 100000, .tRR_min = 20000,
.tRP_min = 17000, .tRST_max = 500000000,
.tWC_min = 35000, .tWB_max = 100000,
.tWH_min = 15000, .tRP_min = 17000,
.tWHR_min = 80000, .tWC_min = 35000,
.tWP_min = 17000, .tWH_min = 15000,
.tWW_min = 100000, .tWHR_min = 80000,
.tWP_min = 17000,
.tWW_min = 100000,
},
}, },
/* Mode 3 */ /* Mode 3 */
{ {
.tADL_min = 400000, .type = NAND_SDR_IFACE,
.tALH_min = 5000, .timings.sdr = {
.tALS_min = 10000, .tADL_min = 400000,
.tAR_min = 10000, .tALH_min = 5000,
.tCEA_max = 25000, .tALS_min = 10000,
.tCEH_min = 20000, .tAR_min = 10000,
.tCH_min = 5000, .tCEA_max = 25000,
.tCHZ_max = 50000, .tCEH_min = 20000,
.tCLH_min = 5000, .tCH_min = 5000,
.tCLR_min = 10000, .tCHZ_max = 50000,
.tCLS_min = 10000, .tCLH_min = 5000,
.tCOH_min = 15000, .tCLR_min = 10000,
.tCS_min = 25000, .tCLS_min = 10000,
.tDH_min = 5000, .tCOH_min = 15000,
.tDS_min = 10000, .tCS_min = 25000,
.tFEAT_max = 1000000, .tDH_min = 5000,
.tIR_min = 0, .tDS_min = 10000,
.tITC_max = 1000000, .tFEAT_max = 1000000,
.tRC_min = 30000, .tIR_min = 0,
.tREA_max = 20000, .tITC_max = 1000000,
.tREH_min = 10000, .tRC_min = 30000,
.tRHOH_min = 15000, .tREA_max = 20000,
.tRHW_min = 100000, .tREH_min = 10000,
.tRHZ_max = 100000, .tRHOH_min = 15000,
.tRLOH_min = 0, .tRHW_min = 100000,
.tRP_min = 15000, .tRHZ_max = 100000,
.tRR_min = 20000, .tRLOH_min = 0,
.tRST_max = 500000000, .tRP_min = 15000,
.tWB_max = 100000, .tRR_min = 20000,
.tWC_min = 30000, .tRST_max = 500000000,
.tWH_min = 10000, .tWB_max = 100000,
.tWHR_min = 80000, .tWC_min = 30000,
.tWP_min = 15000, .tWH_min = 10000,
.tWW_min = 100000, .tWHR_min = 80000,
.tWP_min = 15000,
.tWW_min = 100000,
},
}, },
/* Mode 4 */ /* Mode 4 */
{ {
.tADL_min = 400000, .type = NAND_SDR_IFACE,
.tALH_min = 5000, .timings.sdr = {
.tALS_min = 10000, .tADL_min = 400000,
.tAR_min = 10000, .tALH_min = 5000,
.tCEA_max = 25000, .tALS_min = 10000,
.tCEH_min = 20000, .tAR_min = 10000,
.tCH_min = 5000, .tCEA_max = 25000,
.tCHZ_max = 30000, .tCEH_min = 20000,
.tCLH_min = 5000, .tCH_min = 5000,
.tCLR_min = 10000, .tCHZ_max = 30000,
.tCLS_min = 10000, .tCLH_min = 5000,
.tCOH_min = 15000, .tCLR_min = 10000,
.tCS_min = 20000, .tCLS_min = 10000,
.tDH_min = 5000, .tCOH_min = 15000,
.tDS_min = 10000, .tCS_min = 20000,
.tFEAT_max = 1000000, .tDH_min = 5000,
.tIR_min = 0, .tDS_min = 10000,
.tITC_max = 1000000, .tFEAT_max = 1000000,
.tRC_min = 25000, .tIR_min = 0,
.tREA_max = 20000, .tITC_max = 1000000,
.tREH_min = 10000, .tRC_min = 25000,
.tRHOH_min = 15000, .tREA_max = 20000,
.tRHW_min = 100000, .tREH_min = 10000,
.tRHZ_max = 100000, .tRHOH_min = 15000,
.tRLOH_min = 5000, .tRHW_min = 100000,
.tRP_min = 12000, .tRHZ_max = 100000,
.tRR_min = 20000, .tRLOH_min = 5000,
.tRST_max = 500000000, .tRP_min = 12000,
.tWB_max = 100000, .tRR_min = 20000,
.tWC_min = 25000, .tRST_max = 500000000,
.tWH_min = 10000, .tWB_max = 100000,
.tWHR_min = 80000, .tWC_min = 25000,
.tWP_min = 12000, .tWH_min = 10000,
.tWW_min = 100000, .tWHR_min = 80000,
.tWP_min = 12000,
.tWW_min = 100000,
},
}, },
/* Mode 5 */ /* Mode 5 */
{ {
.tADL_min = 400000, .type = NAND_SDR_IFACE,
.tALH_min = 5000, .timings.sdr = {
.tALS_min = 10000, .tADL_min = 400000,
.tAR_min = 10000, .tALH_min = 5000,
.tCEA_max = 25000, .tALS_min = 10000,
.tCEH_min = 20000, .tAR_min = 10000,
.tCH_min = 5000, .tCEA_max = 25000,
.tCHZ_max = 30000, .tCEH_min = 20000,
.tCLH_min = 5000, .tCH_min = 5000,
.tCLR_min = 10000, .tCHZ_max = 30000,
.tCLS_min = 10000, .tCLH_min = 5000,
.tCOH_min = 15000, .tCLR_min = 10000,
.tCS_min = 15000, .tCLS_min = 10000,
.tDH_min = 5000, .tCOH_min = 15000,
.tDS_min = 7000, .tCS_min = 15000,
.tFEAT_max = 1000000, .tDH_min = 5000,
.tIR_min = 0, .tDS_min = 7000,
.tITC_max = 1000000, .tFEAT_max = 1000000,
.tRC_min = 20000, .tIR_min = 0,
.tREA_max = 16000, .tITC_max = 1000000,
.tREH_min = 7000, .tRC_min = 20000,
.tRHOH_min = 15000, .tREA_max = 16000,
.tRHW_min = 100000, .tREH_min = 7000,
.tRHZ_max = 100000, .tRHOH_min = 15000,
.tRLOH_min = 5000, .tRHW_min = 100000,
.tRP_min = 10000, .tRHZ_max = 100000,
.tRR_min = 20000, .tRLOH_min = 5000,
.tRST_max = 500000000, .tRP_min = 10000,
.tWB_max = 100000, .tRR_min = 20000,
.tWC_min = 20000, .tRST_max = 500000000,
.tWH_min = 7000, .tWB_max = 100000,
.tWHR_min = 80000, .tWC_min = 20000,
.tWP_min = 10000, .tWH_min = 7000,
.tWW_min = 100000, .tWHR_min = 80000,
.tWP_min = 10000,
.tWW_min = 100000,
},
}, },
}; };
...@@ -248,6 +266,6 @@ const struct nand_sdr_timings *onfi_async_timing_mode_to_sdr_timings(int mode) ...@@ -248,6 +266,6 @@ const struct nand_sdr_timings *onfi_async_timing_mode_to_sdr_timings(int mode)
if (mode < 0 || mode >= ARRAY_SIZE(onfi_sdr_timings)) if (mode < 0 || mode >= ARRAY_SIZE(onfi_sdr_timings))
return ERR_PTR(-EINVAL); return ERR_PTR(-EINVAL);
return &onfi_sdr_timings[mode]; return &onfi_sdr_timings[mode].timings.sdr;
} }
EXPORT_SYMBOL(onfi_async_timing_mode_to_sdr_timings); EXPORT_SYMBOL(onfi_async_timing_mode_to_sdr_timings);
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