Commit b1e96b50 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Vinod Koul

dt-bindings: phy: qcom,qusb2: do not define properties in "if" block

It is more readable to define properties in top-level "properties:" and
restrict them (if needed) per compatible in the "if" block.  Defining
properties in "if" block  does not work correctly with
additionalProperties:false:

  sc7180-trogdor-pazquel-lte-ti.dtb: phy@88e3000: 'qcom,bias-ctrl-value', 'qcom,charge-ctrl-value', 'qcom,hsdisc-trim-value',
    'qcom,imp-res-offset-value', 'qcom,preemphasis-level', 'qcom,preemphasis-width' do not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221224154226.43417-1-krzysztof.kozlowski@linaro.orgSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 9160fb7c
......@@ -82,81 +82,74 @@ properties:
Phandle to TCSR syscon register region.
$ref: /schemas/types.yaml#/definitions/phandle
if:
properties:
compatible:
contains:
const: qcom,qusb2-v2-phy
then:
properties:
qcom,imp-res-offset-value:
description:
It is a 6 bit value that specifies offset to be
added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY
tuning parameter that may vary for different boards of same SOC.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 63
default: 0
qcom,bias-ctrl-value:
description:
It is a 6 bit value that specifies bias-ctrl-value. It is a PHY
tuning parameter that may vary for different boards of same SOC.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 63
default: 32
qcom,charge-ctrl-value:
description:
It is a 2 bit value that specifies charge-ctrl-value. It is a PHY
tuning parameter that may vary for different boards of same SOC.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 3
default: 0
qcom,hstx-trim-value:
description:
It is a 4 bit value that specifies tuning for HSTX
output current.
Possible range is - 15mA to 24mA (stepsize of 600 uA).
See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 15
default: 3
qcom,preemphasis-level:
description:
It is a 2 bit value that specifies pre-emphasis level.
Possible range is 0 to 15% (stepsize of 5%).
See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 3
default: 2
qcom,preemphasis-width:
description:
It is a 1 bit value that specifies how long the HSTX
pre-emphasis (specified using qcom,preemphasis-level) must be in
effect. Duration could be half-bit of full-bit.
See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 1
default: 0
qcom,hsdisc-trim-value:
description:
It is a 2 bit value tuning parameter that control disconnect
threshold and may vary for different boards of same SOC.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 3
default: 0
qcom,imp-res-offset-value:
description:
It is a 6 bit value that specifies offset to be
added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY
tuning parameter that may vary for different boards of same SOC.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 63
default: 0
qcom,bias-ctrl-value:
description:
It is a 6 bit value that specifies bias-ctrl-value. It is a PHY
tuning parameter that may vary for different boards of same SOC.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 63
default: 32
qcom,charge-ctrl-value:
description:
It is a 2 bit value that specifies charge-ctrl-value. It is a PHY
tuning parameter that may vary for different boards of same SOC.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 3
default: 0
qcom,hstx-trim-value:
description:
It is a 4 bit value that specifies tuning for HSTX
output current.
Possible range is - 15mA to 24mA (stepsize of 600 uA).
See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 15
default: 3
qcom,preemphasis-level:
description:
It is a 2 bit value that specifies pre-emphasis level.
Possible range is 0 to 15% (stepsize of 5%).
See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 3
default: 2
qcom,preemphasis-width:
description:
It is a 1 bit value that specifies how long the HSTX
pre-emphasis (specified using qcom,preemphasis-level) must be in
effect. Duration could be half-bit of full-bit.
See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 1
default: 0
qcom,hsdisc-trim-value:
description:
It is a 2 bit value tuning parameter that control disconnect
threshold and may vary for different boards of same SOC.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 3
default: 0
required:
- compatible
......@@ -169,6 +162,23 @@ required:
- vdda-phy-dpdm-supply
- resets
allOf:
- if:
not:
properties:
compatible:
contains:
const: qcom,qusb2-v2-phy
then:
properties:
qcom,imp-res-offset-value: false
qcom,bias-ctrl-value: false
qcom,charge-ctrl-value: false
qcom,hstx-trim-value: false
qcom,preemphasis-level: false
qcom,preemphasis-width: false
qcom,hsdisc-trim-value: false
additionalProperties: false
examples:
......
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