Commit b202923d authored by David S. Miller's avatar David S. Miller

Merge branch 'ptp-warnings'

Lee Jones says:

====================
Rid W=1 warnings from PTP

This set is part of a larger effort attempting to clean-up W=1
kernel builds, which are currently overwhelmingly riddled with
niggly little warnings.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents a9349f08 287f93de
......@@ -612,15 +612,6 @@ void pch_gbe_free_tx_resources(struct pch_gbe_adapter *adapter,
void pch_gbe_free_rx_resources(struct pch_gbe_adapter *adapter,
struct pch_gbe_rx_ring *rx_ring);
void pch_gbe_update_stats(struct pch_gbe_adapter *adapter);
u32 pch_ch_control_read(struct pci_dev *pdev);
void pch_ch_control_write(struct pci_dev *pdev, u32 val);
u32 pch_ch_event_read(struct pci_dev *pdev);
void pch_ch_event_write(struct pci_dev *pdev, u32 val);
u32 pch_src_uuid_lo_read(struct pci_dev *pdev);
u32 pch_src_uuid_hi_read(struct pci_dev *pdev);
u64 pch_rx_snap_read(struct pci_dev *pdev);
u64 pch_tx_snap_read(struct pci_dev *pdev);
int pch_set_station_address(u8 *addr, struct pci_dev *pdev);
/* pch_gbe_param.c */
void pch_gbe_check_options(struct pch_gbe_adapter *adapter);
......
......@@ -11,6 +11,7 @@
#include <linux/module.h>
#include <linux/net_tstamp.h>
#include <linux/ptp_classify.h>
#include <linux/ptp_pch.h>
#include <linux/gpio.h>
#define DRV_VERSION "1.01"
......
......@@ -1404,8 +1404,8 @@ static int idtcm_set_pll_mode(struct idtcm_channel *channel,
/* PTP Hardware Clock interface */
/**
* @brief Maximum absolute value for write phase offset in picoseconds
/*
* Maximum absolute value for write phase offset in picoseconds
*
* Destination signed register is 32-bit register in resolution of 50ps
*
......
......@@ -18,6 +18,7 @@
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/ptp_clock_kernel.h>
#include <linux/ptp_pch.h>
#include <linux/slab.h>
#define STATION_ADDR_LEN 20
......@@ -36,7 +37,8 @@ enum pch_status {
PCH_FAILED,
PCH_UNSUPPORTED,
};
/**
/*
* struct pch_ts_regs - IEEE 1588 registers
*/
struct pch_ts_regs {
......@@ -102,7 +104,8 @@ struct pch_ts_regs {
#define PCH_IEEE1588_ETH (1 << 0)
#define PCH_IEEE1588_CAN (1 << 1)
/**
/*
* struct pch_dev - Driver private data
*/
struct pch_dev {
......@@ -119,7 +122,7 @@ struct pch_dev {
spinlock_t register_lock;
};
/**
/*
* struct pch_params - 1588 module parameter
*/
struct pch_params {
......@@ -179,17 +182,6 @@ static inline void pch_block_reset(struct pch_dev *chip)
iowrite32(val, (&chip->regs->control));
}
u32 pch_ch_control_read(struct pci_dev *pdev)
{
struct pch_dev *chip = pci_get_drvdata(pdev);
u32 val;
val = ioread32(&chip->regs->ch_control);
return val;
}
EXPORT_SYMBOL(pch_ch_control_read);
void pch_ch_control_write(struct pci_dev *pdev, u32 val)
{
struct pch_dev *chip = pci_get_drvdata(pdev);
......@@ -296,6 +288,7 @@ static void pch_reset(struct pch_dev *chip)
* IEEE 1588 hardware when looking at PTP
* traffic on the ethernet interface
* @addr: dress which contain the column separated address to be used.
* @pdev: PCI device.
*/
int pch_set_station_address(u8 *addr, struct pci_dev *pdev)
{
......
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* PTP PCH
*
* Copyright 2019 Linaro Ltd.
*
* Author Lee Jones <lee.jones@linaro.org>
*/
#ifndef _PTP_PCH_H_
#define _PTP_PCH_H_
void pch_ch_control_write(struct pci_dev *pdev, u32 val);
u32 pch_ch_event_read(struct pci_dev *pdev);
void pch_ch_event_write(struct pci_dev *pdev, u32 val);
u32 pch_src_uuid_lo_read(struct pci_dev *pdev);
u32 pch_src_uuid_hi_read(struct pci_dev *pdev);
u64 pch_rx_snap_read(struct pci_dev *pdev);
u64 pch_tx_snap_read(struct pci_dev *pdev);
int pch_set_station_address(u8 *addr, struct pci_dev *pdev);
#endif /* _PTP_PCH_H_ */
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