Commit b2b46304 authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman

powerpc: re-initialise lazy FPU/VEC counters on every fault

When a FP/VEC/VSX unavailable fault loads registers and enables the
facility in the MSR, re-set the lazy restore counters to 1 rather
than incrementing them so every fault gets the same number of
restores before the next fault.

This probably shouldn't be a practical change because if a lazy counter
was non-zero then it should have been restored and would not cause a
fault when userspace tries to access it. However the code and comment
implies otherwise so that's misleading and unnecessary.
Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200623234139.2262227-3-npiggin@gmail.com
parent 01eb0187
...@@ -107,9 +107,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX) ...@@ -107,9 +107,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
or r12,r12,r4 or r12,r12,r4
std r12,_MSR(r1) std r12,_MSR(r1)
#endif #endif
/* Don't care if r4 overflows, this is desired behaviour */ li r4,1
lbz r4,THREAD_LOAD_FP(r5)
addi r4,r4,1
stb r4,THREAD_LOAD_FP(r5) stb r4,THREAD_LOAD_FP(r5)
addi r10,r5,THREAD_FPSTATE addi r10,r5,THREAD_FPSTATE
lfd fr0,FPSTATE_FPSCR(r10) lfd fr0,FPSTATE_FPSCR(r10)
......
...@@ -76,9 +76,7 @@ _GLOBAL(load_up_altivec) ...@@ -76,9 +76,7 @@ _GLOBAL(load_up_altivec)
oris r12,r12,MSR_VEC@h oris r12,r12,MSR_VEC@h
std r12,_MSR(r1) std r12,_MSR(r1)
#endif #endif
/* Don't care if r4 overflows, this is desired behaviour */ li r4,1
lbz r4,THREAD_LOAD_VEC(r5)
addi r4,r4,1
stb r4,THREAD_LOAD_VEC(r5) stb r4,THREAD_LOAD_VEC(r5)
addi r6,r5,THREAD_VRSTATE addi r6,r5,THREAD_VRSTATE
li r4,1 li r4,1
......
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