Commit b343ae51 authored by David S. Miller's avatar David S. Miller

sparc64: Support RAW perf events.

Encoding is "(encoding << 16) | pic_mask"
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent b19f8200
...@@ -1038,6 +1038,7 @@ static int __hw_perf_event_init(struct perf_event *event) ...@@ -1038,6 +1038,7 @@ static int __hw_perf_event_init(struct perf_event *event)
if (atomic_read(&nmi_active) < 0) if (atomic_read(&nmi_active) < 0)
return -ENODEV; return -ENODEV;
pmap = NULL;
if (attr->type == PERF_TYPE_HARDWARE) { if (attr->type == PERF_TYPE_HARDWARE) {
if (attr->config >= sparc_pmu->max_events) if (attr->config >= sparc_pmu->max_events)
return -EINVAL; return -EINVAL;
...@@ -1046,9 +1047,18 @@ static int __hw_perf_event_init(struct perf_event *event) ...@@ -1046,9 +1047,18 @@ static int __hw_perf_event_init(struct perf_event *event)
pmap = sparc_map_cache_event(attr->config); pmap = sparc_map_cache_event(attr->config);
if (IS_ERR(pmap)) if (IS_ERR(pmap))
return PTR_ERR(pmap); return PTR_ERR(pmap);
} else } else if (attr->type != PERF_TYPE_RAW)
return -EOPNOTSUPP; return -EOPNOTSUPP;
if (pmap) {
hwc->event_base = perf_event_encode(pmap);
} else {
/* User gives us "(encoding << 16) | pic_mask" for
* PERF_TYPE_RAW events.
*/
hwc->event_base = attr->config;
}
/* We save the enable bits in the config_base. */ /* We save the enable bits in the config_base. */
hwc->config_base = sparc_pmu->irq_bit; hwc->config_base = sparc_pmu->irq_bit;
if (!attr->exclude_user) if (!attr->exclude_user)
...@@ -1058,8 +1068,6 @@ static int __hw_perf_event_init(struct perf_event *event) ...@@ -1058,8 +1068,6 @@ static int __hw_perf_event_init(struct perf_event *event)
if (!attr->exclude_hv) if (!attr->exclude_hv)
hwc->config_base |= sparc_pmu->hv_bit; hwc->config_base |= sparc_pmu->hv_bit;
hwc->event_base = perf_event_encode(pmap);
n = 0; n = 0;
if (event->group_leader != event) { if (event->group_leader != event) {
n = collect_events(event->group_leader, n = collect_events(event->group_leader,
......
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