Commit b385c9e9 authored by Ian Munsie's avatar Ian Munsie Committed by Michael Ellerman

cxl: Add support for CAPP DMA mode

This adds support for using CAPP DMA mode, which is required for XSL
based cards such as the Mellanox CX4 to function.

This is currently an RFC as it depends on the corresponding support to
be merged into skiboot first, which was submitted here:
http://patchwork.ozlabs.org/patch/625582/

In the event that the skiboot on the system does not have the above
support, it will indicate as such in the kernel log and abort the init
process.
Signed-off-by: default avatarIan Munsie <imunsie@au1.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 6d382616
...@@ -825,6 +825,7 @@ enum { ...@@ -825,6 +825,7 @@ enum {
OPAL_PHB_CAPI_MODE_CAPI = 1, OPAL_PHB_CAPI_MODE_CAPI = 1,
OPAL_PHB_CAPI_MODE_SNOOP_OFF = 2, OPAL_PHB_CAPI_MODE_SNOOP_OFF = 2,
OPAL_PHB_CAPI_MODE_SNOOP_ON = 3, OPAL_PHB_CAPI_MODE_SNOOP_ON = 3,
OPAL_PHB_CAPI_MODE_DMA = 4,
}; };
/* OPAL I2C request */ /* OPAL I2C request */
......
...@@ -2793,7 +2793,9 @@ int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode) ...@@ -2793,7 +2793,9 @@ int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode)
pe_info(pe, "Switching PHB to CXL\n"); pe_info(pe, "Switching PHB to CXL\n");
rc = opal_pci_set_phb_cxl_mode(phb->opal_id, mode, pe->pe_number); rc = opal_pci_set_phb_cxl_mode(phb->opal_id, mode, pe->pe_number);
if (rc) if (rc == OPAL_UNSUPPORTED)
dev_err(&dev->dev, "Required cxl mode not supported by firmware - update skiboot\n");
else if (rc)
dev_err(&dev->dev, "opal_pci_set_phb_cxl_mode failed: %i\n", rc); dev_err(&dev->dev, "opal_pci_set_phb_cxl_mode failed: %i\n", rc);
return rc; return rc;
......
...@@ -543,6 +543,7 @@ struct cxl_service_layer_ops { ...@@ -543,6 +543,7 @@ struct cxl_service_layer_ops {
void (*debugfs_stop_trace)(struct cxl *adapter); void (*debugfs_stop_trace)(struct cxl *adapter);
void (*write_timebase_ctrl)(struct cxl *adapter); void (*write_timebase_ctrl)(struct cxl *adapter);
u64 (*timebase_read)(struct cxl *adapter); u64 (*timebase_read)(struct cxl *adapter);
int capi_mode;
}; };
struct cxl_native { struct cxl_native {
......
...@@ -1249,7 +1249,7 @@ static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev) ...@@ -1249,7 +1249,7 @@ static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev)
if ((rc = adapter->native->sl_ops->adapter_regs_init(adapter, dev))) if ((rc = adapter->native->sl_ops->adapter_regs_init(adapter, dev)))
goto err; goto err;
if ((rc = pnv_phb_to_cxl_mode(dev, OPAL_PHB_CAPI_MODE_CAPI))) if ((rc = pnv_phb_to_cxl_mode(dev, adapter->native->sl_ops->capi_mode)))
goto err; goto err;
/* If recovery happened, the last step is to turn on snooping. /* If recovery happened, the last step is to turn on snooping.
...@@ -1293,6 +1293,7 @@ static const struct cxl_service_layer_ops psl_ops = { ...@@ -1293,6 +1293,7 @@ static const struct cxl_service_layer_ops psl_ops = {
.debugfs_stop_trace = cxl_stop_trace, .debugfs_stop_trace = cxl_stop_trace,
.write_timebase_ctrl = write_timebase_ctrl_psl, .write_timebase_ctrl = write_timebase_ctrl_psl,
.timebase_read = timebase_read_psl, .timebase_read = timebase_read_psl,
.capi_mode = OPAL_PHB_CAPI_MODE_CAPI,
}; };
static const struct cxl_service_layer_ops xsl_ops = { static const struct cxl_service_layer_ops xsl_ops = {
...@@ -1300,6 +1301,7 @@ static const struct cxl_service_layer_ops xsl_ops = { ...@@ -1300,6 +1301,7 @@ static const struct cxl_service_layer_ops xsl_ops = {
.debugfs_add_adapter_sl_regs = cxl_debugfs_add_adapter_xsl_regs, .debugfs_add_adapter_sl_regs = cxl_debugfs_add_adapter_xsl_regs,
.write_timebase_ctrl = write_timebase_ctrl_xsl, .write_timebase_ctrl = write_timebase_ctrl_xsl,
.timebase_read = timebase_read_xsl, .timebase_read = timebase_read_xsl,
.capi_mode = OPAL_PHB_CAPI_MODE_DMA,
}; };
static void set_sl_ops(struct cxl *adapter, struct pci_dev *dev) static void set_sl_ops(struct cxl *adapter, struct pci_dev *dev)
......
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