Commit b3e57bcc authored by Dhinakaran Pandiyan's avatar Dhinakaran Pandiyan Committed by Imre Deak

drm/i915/tgl: Gen-12 render decompression

Gen-12 display decompression operates on Y-tiled compressed main surface.
The CCS is linear and has 4 bits of metadata for each main surface cache
line pair, a size ratio of 1:256. Gen-12 display decompression is
incompatible with buffers compressed by earlier GPUs, so make use of a new
modifier to identify gen-12 compression. Another notable change is that
render decompression is supported on all planes except cursor and on all
pipes. Start by adding render decompression support for [A,X]BGR888 pixel
formats.

v2: Fix checkpatch warnings (Lucas)
v3:
Rebase, disable color clear, styling changes and modify
intel_tile_width_bytes and intel_tile_height to handle linear CCS
v4:
- Use format block descriptors and the i915 specific func to get the
  subsampling for each color plane.
- Use helpers to convert between CCS and main planes.
v5:
- Fix subsampling returned by intel_fb_plane_get_subsampling() for
  the CCS plane of the first plane.
v6:
- Rebased on v2 of patch 4.
v7:
- Fix plane dimensions during FB check.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Nanley G Chery <nanley.g.chery@intel.com>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: default avatarDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> (v6)
Link: https://patchwork.freedesktop.org/patch/msgid/20191221120543.22816-7-imre.deak@intel.com
parent 55656505
...@@ -583,6 +583,7 @@ skl_program_plane(struct intel_plane *plane, ...@@ -583,6 +583,7 @@ skl_program_plane(struct intel_plane *plane,
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
u32 surf_addr = plane_state->color_plane[color_plane].offset; u32 surf_addr = plane_state->color_plane[color_plane].offset;
u32 stride = skl_plane_stride(plane_state, color_plane); u32 stride = skl_plane_stride(plane_state, color_plane);
u32 aux_dist = plane_state->color_plane[1].offset - surf_addr;
u32 aux_stride = skl_plane_stride(plane_state, 1); u32 aux_stride = skl_plane_stride(plane_state, 1);
int crtc_x = plane_state->uapi.dst.x1; int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1; int crtc_y = plane_state->uapi.dst.y1;
...@@ -624,8 +625,10 @@ skl_program_plane(struct intel_plane *plane, ...@@ -624,8 +625,10 @@ skl_program_plane(struct intel_plane *plane,
I915_WRITE_FW(PLANE_STRIDE(pipe, plane_id), stride); I915_WRITE_FW(PLANE_STRIDE(pipe, plane_id), stride);
I915_WRITE_FW(PLANE_POS(pipe, plane_id), (crtc_y << 16) | crtc_x); I915_WRITE_FW(PLANE_POS(pipe, plane_id), (crtc_y << 16) | crtc_x);
I915_WRITE_FW(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w); I915_WRITE_FW(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w);
I915_WRITE_FW(PLANE_AUX_DIST(pipe, plane_id),
(plane_state->color_plane[1].offset - surf_addr) | aux_stride); if (INTEL_GEN(dev_priv) < 12)
aux_dist |= aux_stride;
I915_WRITE_FW(PLANE_AUX_DIST(pipe, plane_id), aux_dist);
if (icl_is_hdr_plane(dev_priv, plane_id)) if (icl_is_hdr_plane(dev_priv, plane_id))
I915_WRITE_FW(PLANE_CUS_CTL(pipe, plane_id), plane_state->cus_ctl); I915_WRITE_FW(PLANE_CUS_CTL(pipe, plane_id), plane_state->cus_ctl);
...@@ -2102,7 +2105,8 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, ...@@ -2102,7 +2105,8 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
(fb->modifier == I915_FORMAT_MOD_Y_TILED || (fb->modifier == I915_FORMAT_MOD_Y_TILED ||
fb->modifier == I915_FORMAT_MOD_Yf_TILED || fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS || fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS)) { fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
fb->modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS)) {
DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n"); DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
return -EINVAL; return -EINVAL;
} }
...@@ -2573,7 +2577,8 @@ static const u64 skl_plane_format_modifiers_ccs[] = { ...@@ -2573,7 +2577,8 @@ static const u64 skl_plane_format_modifiers_ccs[] = {
DRM_FORMAT_MOD_INVALID DRM_FORMAT_MOD_INVALID
}; };
static const u64 gen12_plane_format_modifiers_noccs[] = { static const u64 gen12_plane_format_modifiers_ccs[] = {
I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
I915_FORMAT_MOD_Y_TILED, I915_FORMAT_MOD_Y_TILED,
I915_FORMAT_MOD_X_TILED, I915_FORMAT_MOD_X_TILED,
DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_MOD_LINEAR,
...@@ -2744,6 +2749,7 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane, ...@@ -2744,6 +2749,7 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_MOD_LINEAR: case DRM_FORMAT_MOD_LINEAR:
case I915_FORMAT_MOD_X_TILED: case I915_FORMAT_MOD_X_TILED:
case I915_FORMAT_MOD_Y_TILED: case I915_FORMAT_MOD_Y_TILED:
case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
break; break;
default: default:
return false; return false;
...@@ -2754,6 +2760,9 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane, ...@@ -2754,6 +2760,9 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_XBGR8888: case DRM_FORMAT_XBGR8888:
case DRM_FORMAT_ARGB8888: case DRM_FORMAT_ARGB8888:
case DRM_FORMAT_ABGR8888: case DRM_FORMAT_ABGR8888:
if (is_ccs_modifier(modifier))
return true;
/* fall through */
case DRM_FORMAT_RGB565: case DRM_FORMAT_RGB565:
case DRM_FORMAT_XRGB2101010: case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010: case DRM_FORMAT_XBGR2101010:
...@@ -2963,13 +2972,11 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv, ...@@ -2963,13 +2972,11 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
formats = skl_get_plane_formats(dev_priv, pipe, formats = skl_get_plane_formats(dev_priv, pipe,
plane_id, &num_formats); plane_id, &num_formats);
plane->has_ccs = skl_plane_has_ccs(dev_priv, pipe, plane_id);
if (INTEL_GEN(dev_priv) >= 12) { if (INTEL_GEN(dev_priv) >= 12) {
/* TODO: Implement support for gen-12 CCS modifiers */ modifiers = gen12_plane_format_modifiers_ccs;
plane->has_ccs = false;
modifiers = gen12_plane_format_modifiers_noccs;
plane_funcs = &gen12_plane_funcs; plane_funcs = &gen12_plane_funcs;
} else { } else {
plane->has_ccs = skl_plane_has_ccs(dev_priv, pipe, plane_id);
if (plane->has_ccs) if (plane->has_ccs)
modifiers = skl_plane_format_modifiers_ccs; modifiers = skl_plane_format_modifiers_ccs;
else else
......
...@@ -6800,6 +6800,7 @@ enum { ...@@ -6800,6 +6800,7 @@ enum {
#define PLANE_CTL_YUV422_VYUY (3 << 16) #define PLANE_CTL_YUV422_VYUY (3 << 16)
#define PLANE_CTL_RENDER_DECOMPRESSION_ENABLE (1 << 15) #define PLANE_CTL_RENDER_DECOMPRESSION_ENABLE (1 << 15)
#define PLANE_CTL_TRICKLE_FEED_DISABLE (1 << 14) #define PLANE_CTL_TRICKLE_FEED_DISABLE (1 << 14)
#define PLANE_CTL_CLEAR_COLOR_DISABLE (1 << 13) /* TGL+ */
#define PLANE_CTL_PLANE_GAMMA_DISABLE (1 << 13) /* Pre-GLK */ #define PLANE_CTL_PLANE_GAMMA_DISABLE (1 << 13) /* Pre-GLK */
#define PLANE_CTL_TILED_MASK (0x7 << 10) #define PLANE_CTL_TILED_MASK (0x7 << 10)
#define PLANE_CTL_TILED_LINEAR (0 << 10) #define PLANE_CTL_TILED_LINEAR (0 << 10)
......
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