Commit b58e9fd4 authored by David S. Miller's avatar David S. Miller

Merge branch 'sfp-copper-modules'

Russell King says:

====================
Add support for SFP+ copper modules

This series adds support for Copper SFP+ modules with Clause 45 PHYs.
Specifically the patches:

1. drop support for the probably never tested 100BASE-*X modules.
2. drop EEPROM ID from sfp_select_interface()
3. add more compliance code definitions from SFF-8024, renaming the
   existing definitions.
4. add module start/stop methods so phylink knows when a module is
   about to become active. The module start method is called after
   we have probed for a PHY on the module.
5. move start/stop of module PHY down into phylink using the new
   module start/stop methods.
6. add support for Clause 45 I2C accesses, tested with Methode DM7052.
   Other modules appear to use the same protocol, but slight
   differences, but I do not have those modules to test with.
   (if someone does, please holler!)
7. rearrange how we attach to PHYs so that we can support Clause 45
   PHYs with indeterminant interface modes.  (Clause 45 PHYs appear
   to like to change their PHY interface mode depending on the
   negotiated speed.)
8. add support for phylink to connect to a clause 45 PHY on a SFP
   module.
9. split the link_an_mode between the configured value and the
   currently selected mode value; some clause 45 PHYs have no
   capability to provide in-band negotiation.
10. split the link configuration on SFP module insertion in phylink
    so we can use it in other code paths.
11. delay MAC configuration for copper modules without a PHY to the
    module start method - after any module PHY has been probed.  If
    the module has a PHY, then we setup the MAC when the PHY is
    detected.
12. the Broadcom 84881 PHY does not support in-band negotiation even
    though it uses SGMII and 2500BASE-X.  Having the MAC operating
    with in-band negotiation enabled, even with AN bypass enabled,
    results in no link - Broadcom say that the host MAC must always
    be forced.
13. add support for the Broadcom 84881 PHY found on the Methode
    DM7052 module.
14. add support to SFP to probe for a Clause 45 PHY on copper SFP+
    modules.

v3: now bisectable!
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents c2193999 9a484621
......@@ -324,6 +324,12 @@ config BROADCOM_PHY
Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
BCM5481, BCM54810 and BCM5482 PHYs.
config BCM84881_PHY
bool "Broadcom BCM84881 PHY"
depends on PHYLIB=y
---help---
Support the Broadcom BCM84881 PHY.
config CICADA_PHY
tristate "Cicada PHYs"
---help---
......
......@@ -62,6 +62,7 @@ obj-$(CONFIG_BCM87XX_PHY) += bcm87xx.o
obj-$(CONFIG_BCM_CYGNUS_PHY) += bcm-cygnus.o
obj-$(CONFIG_BCM_NET_PHYLIB) += bcm-phy-lib.o
obj-$(CONFIG_BROADCOM_PHY) += broadcom.o
obj-$(CONFIG_BCM84881_PHY) += bcm84881.o
obj-$(CONFIG_CICADA_PHY) += cicada.o
obj-$(CONFIG_CORTINA_PHY) += cortina.o
obj-$(CONFIG_DAVICOM_PHY) += davicom.o
......
// SPDX-License-Identifier: GPL-2.0
// Broadcom BCM84881 NBASE-T PHY driver, as found on a SFP+ module.
// Copyright (C) 2019 Russell King, Deep Blue Solutions Ltd.
//
// Like the Marvell 88x3310, the Broadcom 84881 changes its host-side
// interface according to the operating speed between 10GBASE-R,
// 2500BASE-X and SGMII (but unlike the 88x3310, without the control
// word).
//
// This driver only supports those aspects of the PHY that I'm able to
// observe and test with the SFP+ module, which is an incomplete subset
// of what this PHY is able to support. For example, I only assume it
// supports a single lane Serdes connection, but it may be that the PHY
// is able to support more than that.
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/phy.h>
enum {
MDIO_AN_C22 = 0xffe0,
};
static int bcm84881_wait_init(struct phy_device *phydev)
{
unsigned int tries = 20;
int ret, val;
do {
val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1);
if (val < 0) {
ret = val;
break;
}
if (!(val & MDIO_CTRL1_RESET)) {
ret = 0;
break;
}
if (!--tries) {
ret = -ETIMEDOUT;
break;
}
msleep(100);
} while (1);
if (ret)
phydev_err(phydev, "%s failed: %d\n", __func__, ret);
return ret;
}
static int bcm84881_config_init(struct phy_device *phydev)
{
switch (phydev->interface) {
case PHY_INTERFACE_MODE_SGMII:
case PHY_INTERFACE_MODE_2500BASEX:
case PHY_INTERFACE_MODE_10GKR:
break;
default:
return -ENODEV;
}
return 0;
}
static int bcm84881_probe(struct phy_device *phydev)
{
/* This driver requires PMAPMD and AN blocks */
const u32 mmd_mask = MDIO_DEVS_PMAPMD | MDIO_DEVS_AN;
if (!phydev->is_c45 ||
(phydev->c45_ids.devices_in_package & mmd_mask) != mmd_mask)
return -ENODEV;
return 0;
}
static int bcm84881_get_features(struct phy_device *phydev)
{
int ret;
ret = genphy_c45_pma_read_abilities(phydev);
if (ret)
return ret;
/* Although the PHY sets bit 1.11.8, it does not support 10M modes */
linkmode_clear_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT,
phydev->supported);
linkmode_clear_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT,
phydev->supported);
return 0;
}
static int bcm84881_config_aneg(struct phy_device *phydev)
{
bool changed = false;
u32 adv;
int ret;
/* Wait for the PHY to finish initialising, otherwise our
* advertisement may be overwritten.
*/
ret = bcm84881_wait_init(phydev);
if (ret)
return ret;
/* We don't support manual MDI control */
phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
/* disabled autoneg doesn't seem to work with this PHY */
if (phydev->autoneg == AUTONEG_DISABLE)
return -EINVAL;
ret = genphy_c45_an_config_aneg(phydev);
if (ret < 0)
return ret;
if (ret > 0)
changed = true;
adv = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN,
MDIO_AN_C22 + MII_CTRL1000,
ADVERTISE_1000FULL | ADVERTISE_1000HALF,
adv);
if (ret < 0)
return ret;
if (ret > 0)
changed = true;
return genphy_c45_check_and_restart_aneg(phydev, changed);
}
static int bcm84881_aneg_done(struct phy_device *phydev)
{
int bmsr, val;
val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);
if (val < 0)
return val;
bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR);
if (bmsr < 0)
return val;
return !!(val & MDIO_AN_STAT1_COMPLETE) &&
!!(bmsr & BMSR_ANEGCOMPLETE);
}
static int bcm84881_read_status(struct phy_device *phydev)
{
unsigned int mode;
int bmsr, val;
val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1);
if (val < 0)
return val;
if (val & MDIO_AN_CTRL1_RESTART) {
phydev->link = 0;
return 0;
}
val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);
if (val < 0)
return val;
bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR);
if (bmsr < 0)
return val;
phydev->autoneg_complete = !!(val & MDIO_AN_STAT1_COMPLETE) &&
!!(bmsr & BMSR_ANEGCOMPLETE);
phydev->link = !!(val & MDIO_STAT1_LSTATUS) &&
!!(bmsr & BMSR_LSTATUS);
if (phydev->autoneg == AUTONEG_ENABLE && !phydev->autoneg_complete)
phydev->link = false;
if (!phydev->link)
return 0;
linkmode_zero(phydev->lp_advertising);
phydev->speed = SPEED_UNKNOWN;
phydev->duplex = DUPLEX_UNKNOWN;
phydev->pause = 0;
phydev->asym_pause = 0;
phydev->mdix = 0;
if (phydev->autoneg_complete) {
val = genphy_c45_read_lpa(phydev);
if (val < 0)
return val;
val = phy_read_mmd(phydev, MDIO_MMD_AN,
MDIO_AN_C22 + MII_STAT1000);
if (val < 0)
return val;
mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
if (phydev->autoneg == AUTONEG_ENABLE)
phy_resolve_aneg_linkmode(phydev);
}
if (phydev->autoneg == AUTONEG_DISABLE) {
/* disabled autoneg doesn't seem to work, so force the link
* down.
*/
phydev->link = 0;
return 0;
}
/* Set the host link mode - we set the phy interface mode and
* the speed according to this register so that downshift works.
* We leave the duplex setting as per the resolution from the
* above.
*/
val = phy_read_mmd(phydev, MDIO_MMD_VEND1, 0x4011);
mode = (val & 0x1e) >> 1;
if (mode == 1 || mode == 2)
phydev->interface = PHY_INTERFACE_MODE_SGMII;
else if (mode == 3)
phydev->interface = PHY_INTERFACE_MODE_10GKR;
else if (mode == 4)
phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
switch (mode & 7) {
case 1:
phydev->speed = SPEED_100;
break;
case 2:
phydev->speed = SPEED_1000;
break;
case 3:
phydev->speed = SPEED_10000;
break;
case 4:
phydev->speed = SPEED_2500;
break;
case 5:
phydev->speed = SPEED_5000;
break;
}
return genphy_c45_read_mdix(phydev);
}
static struct phy_driver bcm84881_drivers[] = {
{
.phy_id = 0xae025150,
.phy_id_mask = 0xfffffff0,
.name = "Broadcom BCM84881",
.config_init = bcm84881_config_init,
.probe = bcm84881_probe,
.get_features = bcm84881_get_features,
.config_aneg = bcm84881_config_aneg,
.aneg_done = bcm84881_aneg_done,
.read_status = bcm84881_read_status,
},
};
module_phy_driver(bcm84881_drivers);
/* FIXME: module auto-loading for Clause 45 PHYs seems non-functional */
static struct mdio_device_id __maybe_unused bcm84881_tbl[] = {
{ 0xae025150, 0xfffffff0 },
{ },
};
MODULE_AUTHOR("Russell King");
MODULE_DESCRIPTION("Broadcom BCM84881 PHY driver");
MODULE_DEVICE_TABLE(mdio, bcm84881_tbl);
MODULE_LICENSE("GPL");
......@@ -214,7 +214,7 @@ static int mv3310_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
phy_interface_t iface;
sfp_parse_support(phydev->sfp_bus, id, support);
iface = sfp_select_interface(phydev->sfp_bus, id, support);
iface = sfp_select_interface(phydev->sfp_bus, support);
if (iface != PHY_INTERFACE_MODE_10GKR) {
dev_err(&phydev->mdio.dev, "incompatible SFP module inserted\n");
......
......@@ -33,17 +33,24 @@ static int i2c_mii_read(struct mii_bus *bus, int phy_id, int reg)
{
struct i2c_adapter *i2c = bus->priv;
struct i2c_msg msgs[2];
u8 data[2], dev_addr = reg;
u8 addr[3], data[2], *p;
int bus_addr, ret;
if (!i2c_mii_valid_phy_id(phy_id))
return 0xffff;
p = addr;
if (reg & MII_ADDR_C45) {
*p++ = 0x20 | ((reg >> 16) & 31);
*p++ = reg >> 8;
}
*p++ = reg;
bus_addr = i2c_mii_phy_addr(phy_id);
msgs[0].addr = bus_addr;
msgs[0].flags = 0;
msgs[0].len = 1;
msgs[0].buf = &dev_addr;
msgs[0].len = p - addr;
msgs[0].buf = addr;
msgs[1].addr = bus_addr;
msgs[1].flags = I2C_M_RD;
msgs[1].len = sizeof(data);
......@@ -61,18 +68,23 @@ static int i2c_mii_write(struct mii_bus *bus, int phy_id, int reg, u16 val)
struct i2c_adapter *i2c = bus->priv;
struct i2c_msg msg;
int ret;
u8 data[3];
u8 data[5], *p;
if (!i2c_mii_valid_phy_id(phy_id))
return 0;
data[0] = reg;
data[1] = val >> 8;
data[2] = val;
p = data;
if (reg & MII_ADDR_C45) {
*p++ = (reg >> 16) & 31;
*p++ = reg >> 8;
}
*p++ = reg;
*p++ = val >> 8;
*p++ = val;
msg.addr = i2c_mii_phy_addr(phy_id);
msg.flags = 0;
msg.len = 3;
msg.len = p - data;
msg.buf = data;
ret = i2c_transfer(i2c, &msg, 1);
......
This diff is collapsed.
......@@ -103,6 +103,7 @@ static const struct sfp_quirk *sfp_lookup_quirk(const struct sfp_eeprom_id *id)
return NULL;
}
/**
* sfp_parse_port() - Parse the EEPROM base ID, setting the port type
* @bus: a pointer to the &struct sfp_bus structure for the sfp module
......@@ -124,35 +125,35 @@ int sfp_parse_port(struct sfp_bus *bus, const struct sfp_eeprom_id *id,
/* port is the physical connector, set this from the connector field. */
switch (id->base.connector) {
case SFP_CONNECTOR_SC:
case SFP_CONNECTOR_FIBERJACK:
case SFP_CONNECTOR_LC:
case SFP_CONNECTOR_MT_RJ:
case SFP_CONNECTOR_MU:
case SFP_CONNECTOR_OPTICAL_PIGTAIL:
case SFF8024_CONNECTOR_SC:
case SFF8024_CONNECTOR_FIBERJACK:
case SFF8024_CONNECTOR_LC:
case SFF8024_CONNECTOR_MT_RJ:
case SFF8024_CONNECTOR_MU:
case SFF8024_CONNECTOR_OPTICAL_PIGTAIL:
case SFF8024_CONNECTOR_MPO_1X12:
case SFF8024_CONNECTOR_MPO_2X16:
port = PORT_FIBRE;
break;
case SFP_CONNECTOR_RJ45:
case SFF8024_CONNECTOR_RJ45:
port = PORT_TP;
break;
case SFP_CONNECTOR_COPPER_PIGTAIL:
case SFF8024_CONNECTOR_COPPER_PIGTAIL:
port = PORT_DA;
break;
case SFP_CONNECTOR_UNSPEC:
case SFF8024_CONNECTOR_UNSPEC:
if (id->base.e1000_base_t) {
port = PORT_TP;
break;
}
/* fallthrough */
case SFP_CONNECTOR_SG: /* guess */
case SFP_CONNECTOR_MPO_1X12:
case SFP_CONNECTOR_MPO_2X16:
case SFP_CONNECTOR_HSSDC_II:
case SFP_CONNECTOR_NOSEPARATE:
case SFP_CONNECTOR_MXC_2X16:
case SFF8024_CONNECTOR_SG: /* guess */
case SFF8024_CONNECTOR_HSSDC_II:
case SFF8024_CONNECTOR_NOSEPARATE:
case SFF8024_CONNECTOR_MXC_2X16:
port = PORT_OTHER;
break;
default:
......@@ -178,6 +179,33 @@ int sfp_parse_port(struct sfp_bus *bus, const struct sfp_eeprom_id *id,
}
EXPORT_SYMBOL_GPL(sfp_parse_port);
/**
* sfp_may_have_phy() - indicate whether the module may have a PHY
* @bus: a pointer to the &struct sfp_bus structure for the sfp module
* @id: a pointer to the module's &struct sfp_eeprom_id
*
* Parse the EEPROM identification given in @id, and return whether
* this module may have a PHY.
*/
bool sfp_may_have_phy(struct sfp_bus *bus, const struct sfp_eeprom_id *id)
{
if (id->base.e1000_base_t)
return true;
if (id->base.phys_id != SFF8024_ID_DWDM_SFP) {
switch (id->base.extended_cc) {
case SFF8024_ECC_10GBASE_T_SFI:
case SFF8024_ECC_10GBASE_T_SR:
case SFF8024_ECC_5GBASE_T:
case SFF8024_ECC_2_5GBASE_T:
return true;
}
}
return false;
}
EXPORT_SYMBOL_GPL(sfp_may_have_phy);
/**
* sfp_parse_support() - Parse the eeprom id for supported link modes
* @bus: a pointer to the &struct sfp_bus structure for the sfp module
......@@ -261,22 +289,33 @@ void sfp_parse_support(struct sfp_bus *bus, const struct sfp_eeprom_id *id,
}
switch (id->base.extended_cc) {
case 0x00: /* Unspecified */
case SFF8024_ECC_UNSPEC:
break;
case 0x02: /* 100Gbase-SR4 or 25Gbase-SR */
case SFF8024_ECC_100GBASE_SR4_25GBASE_SR:
phylink_set(modes, 100000baseSR4_Full);
phylink_set(modes, 25000baseSR_Full);
break;
case 0x03: /* 100Gbase-LR4 or 25Gbase-LR */
case 0x04: /* 100Gbase-ER4 or 25Gbase-ER */
case SFF8024_ECC_100GBASE_LR4_25GBASE_LR:
case SFF8024_ECC_100GBASE_ER4_25GBASE_ER:
phylink_set(modes, 100000baseLR4_ER4_Full);
break;
case 0x0b: /* 100Gbase-CR4 or 25Gbase-CR CA-L */
case 0x0c: /* 25Gbase-CR CA-S */
case 0x0d: /* 25Gbase-CR CA-N */
case SFF8024_ECC_100GBASE_CR4:
phylink_set(modes, 100000baseCR4_Full);
/* fallthrough */
case SFF8024_ECC_25GBASE_CR_S:
case SFF8024_ECC_25GBASE_CR_N:
phylink_set(modes, 25000baseCR_Full);
break;
case SFF8024_ECC_10GBASE_T_SFI:
case SFF8024_ECC_10GBASE_T_SR:
phylink_set(modes, 10000baseT_Full);
break;
case SFF8024_ECC_5GBASE_T:
phylink_set(modes, 5000baseT_Full);
break;
case SFF8024_ECC_2_5GBASE_T:
phylink_set(modes, 2500baseT_Full);
break;
default:
dev_warn(bus->sfp_dev,
"Unknown/unsupported extended compliance code: 0x%02x\n",
......@@ -301,7 +340,7 @@ void sfp_parse_support(struct sfp_bus *bus, const struct sfp_eeprom_id *id,
*/
if (bitmap_empty(modes, __ETHTOOL_LINK_MODE_MASK_NBITS)) {
/* If the encoding and bit rate allows 1000baseX */
if (id->base.encoding == SFP_ENCODING_8B10B && br_nom &&
if (id->base.encoding == SFF8024_ENCODING_8B10B && br_nom &&
br_min <= 1300 && br_max >= 1200)
phylink_set(modes, 1000baseX_Full);
}
......@@ -320,31 +359,27 @@ EXPORT_SYMBOL_GPL(sfp_parse_support);
/**
* sfp_select_interface() - Select appropriate phy_interface_t mode
* @bus: a pointer to the &struct sfp_bus structure for the sfp module
* @id: a pointer to the module's &struct sfp_eeprom_id
* @link_modes: ethtool link modes mask
*
* Derive the phy_interface_t mode for the information found in the
* module's identifying EEPROM and the link modes mask. There is no
* standard or defined way to derive this information, so we decide
* based upon the link mode mask.
* Derive the phy_interface_t mode for the SFP module from the link
* modes mask.
*/
phy_interface_t sfp_select_interface(struct sfp_bus *bus,
const struct sfp_eeprom_id *id,
unsigned long *link_modes)
{
if (phylink_test(link_modes, 10000baseCR_Full) ||
phylink_test(link_modes, 10000baseSR_Full) ||
phylink_test(link_modes, 10000baseLR_Full) ||
phylink_test(link_modes, 10000baseLRM_Full) ||
phylink_test(link_modes, 10000baseER_Full))
phylink_test(link_modes, 10000baseER_Full) ||
phylink_test(link_modes, 10000baseT_Full))
return PHY_INTERFACE_MODE_10GKR;
if (phylink_test(link_modes, 2500baseX_Full))
return PHY_INTERFACE_MODE_2500BASEX;
if (id->base.e1000_base_t ||
id->base.e100_base_lx ||
id->base.e100_base_fx)
if (phylink_test(link_modes, 1000baseT_Half) ||
phylink_test(link_modes, 1000baseT_Full))
return PHY_INTERFACE_MODE_SGMII;
if (phylink_test(link_modes, 1000baseX_Full))
......@@ -705,6 +740,27 @@ void sfp_module_remove(struct sfp_bus *bus)
}
EXPORT_SYMBOL_GPL(sfp_module_remove);
int sfp_module_start(struct sfp_bus *bus)
{
const struct sfp_upstream_ops *ops = sfp_get_upstream_ops(bus);
int ret = 0;
if (ops && ops->module_start)
ret = ops->module_start(bus->upstream);
return ret;
}
EXPORT_SYMBOL_GPL(sfp_module_start);
void sfp_module_stop(struct sfp_bus *bus)
{
const struct sfp_upstream_ops *ops = sfp_get_upstream_ops(bus);
if (ops && ops->module_stop)
ops->module_stop(bus->upstream);
}
EXPORT_SYMBOL_GPL(sfp_module_stop);
static void sfp_socket_clear(struct sfp_bus *bus)
{
bus->sfp_dev = NULL;
......
......@@ -59,6 +59,7 @@ enum {
SFP_DEV_UP,
SFP_S_DOWN = 0,
SFP_S_FAIL,
SFP_S_WAIT,
SFP_S_INIT,
SFP_S_INIT_TX_FAULT,
......@@ -122,6 +123,7 @@ static const char *event_to_str(unsigned short event)
static const char * const sm_state_strings[] = {
[SFP_S_DOWN] = "down",
[SFP_S_FAIL] = "fail",
[SFP_S_WAIT] = "wait",
[SFP_S_INIT] = "init",
[SFP_S_INIT_TX_FAULT] = "init_tx_fault",
......@@ -242,7 +244,7 @@ struct sfp {
static bool sff_module_supported(const struct sfp_eeprom_id *id)
{
return id->base.phys_id == SFP_PHYS_ID_SFF &&
return id->base.phys_id == SFF8024_ID_SFF_8472 &&
id->base.phys_ext_id == SFP_PHYS_EXT_ID_SFP;
}
......@@ -253,7 +255,7 @@ static const struct sff_data sff_data = {
static bool sfp_module_supported(const struct sfp_eeprom_id *id)
{
return id->base.phys_id == SFP_PHYS_ID_SFP &&
return id->base.phys_id == SFF8024_ID_SFP &&
id->base.phys_ext_id == SFP_PHYS_EXT_ID_SFP;
}
......@@ -1394,19 +1396,18 @@ static void sfp_sm_mod_next(struct sfp *sfp, unsigned int state,
static void sfp_sm_phy_detach(struct sfp *sfp)
{
phy_stop(sfp->mod_phy);
sfp_remove_phy(sfp->sfp_bus);
phy_device_remove(sfp->mod_phy);
phy_device_free(sfp->mod_phy);
sfp->mod_phy = NULL;
}
static void sfp_sm_probe_phy(struct sfp *sfp)
static void sfp_sm_probe_phy(struct sfp *sfp, bool is_c45)
{
struct phy_device *phy;
int err;
phy = mdiobus_scan(sfp->i2c_mii, SFP_PHY_ADDR);
phy = get_phy_device(sfp->i2c_mii, SFP_PHY_ADDR, is_c45);
if (phy == ERR_PTR(-ENODEV)) {
dev_info(sfp->dev, "no PHY detected\n");
return;
......@@ -1416,6 +1417,13 @@ static void sfp_sm_probe_phy(struct sfp *sfp)
return;
}
err = phy_device_register(phy);
if (err) {
phy_device_free(phy);
dev_err(sfp->dev, "phy_device_register failed: %d\n", err);
return;
}
err = sfp_add_phy(sfp->sfp_bus, phy);
if (err) {
phy_device_remove(phy);
......@@ -1425,7 +1433,6 @@ static void sfp_sm_probe_phy(struct sfp *sfp)
}
sfp->mod_phy = phy;
phy_start(phy);
}
static void sfp_sm_link_up(struct sfp *sfp)
......@@ -1487,21 +1494,32 @@ static void sfp_sm_fault(struct sfp *sfp, unsigned int next_state, bool warn)
}
}
/* Probe a SFP for a PHY device if the module supports copper - the PHY
* normally sits at I2C bus address 0x56, and may either be a clause 22
* or clause 45 PHY.
*
* Clause 22 copper SFP modules normally operate in Cisco SGMII mode with
* negotiation enabled, but some may be in 1000base-X - which is for the
* PHY driver to determine.
*
* Clause 45 copper SFP+ modules (10G) appear to switch their interface
* mode according to the negotiated line speed.
*/
static void sfp_sm_probe_for_phy(struct sfp *sfp)
{
/* Setting the serdes link mode is guesswork: there's no
* field in the EEPROM which indicates what mode should
* be used.
*
* If it's a gigabit-only fiber module, it probably does
* not have a PHY, so switch to 802.3z negotiation mode.
* Otherwise, switch to SGMII mode (which is required to
* support non-gigabit speeds) and probe for a PHY.
*/
if (sfp->id.base.e1000_base_t ||
sfp->id.base.e100_base_lx ||
sfp->id.base.e100_base_fx)
sfp_sm_probe_phy(sfp);
switch (sfp->id.base.extended_cc) {
case SFF8024_ECC_10GBASE_T_SFI:
case SFF8024_ECC_10GBASE_T_SR:
case SFF8024_ECC_5GBASE_T:
case SFF8024_ECC_2_5GBASE_T:
sfp_sm_probe_phy(sfp, true);
break;
default:
if (sfp->id.base.e1000_base_t)
sfp_sm_probe_phy(sfp, false);
break;
}
}
static int sfp_module_parse_power(struct sfp *sfp)
......@@ -1561,6 +1579,13 @@ static int sfp_sm_mod_hpower(struct sfp *sfp, bool enable)
return -EAGAIN;
}
/* DM7052 reports as a high power module, responds to reads (with
* all bytes 0xff) at 0x51 but does not accept writes. In any case,
* if the bit is already set, we're already in high power mode.
*/
if (!!(val & BIT(0)) == enable)
return 0;
if (enable)
val |= BIT(0);
else
......@@ -1837,6 +1862,8 @@ static void sfp_sm_main(struct sfp *sfp, unsigned int event)
if (sfp->sm_state == SFP_S_LINK_UP &&
sfp->sm_dev_state == SFP_DEV_UP)
sfp_sm_link_down(sfp);
if (sfp->sm_state > SFP_S_INIT)
sfp_module_stop(sfp->sfp_bus);
if (sfp->mod_phy)
sfp_sm_phy_detach(sfp);
sfp_module_tx_disable(sfp);
......@@ -1904,6 +1931,10 @@ static void sfp_sm_main(struct sfp *sfp, unsigned int event)
* clear. Probe for the PHY and check the LOS state.
*/
sfp_sm_probe_for_phy(sfp);
if (sfp_module_start(sfp->sfp_bus)) {
sfp_sm_next(sfp, SFP_S_FAIL, 0);
break;
}
sfp_sm_link_check_los(sfp);
/* Reset the fault retry count */
......
......@@ -22,6 +22,8 @@ void sfp_link_up(struct sfp_bus *bus);
void sfp_link_down(struct sfp_bus *bus);
int sfp_module_insert(struct sfp_bus *bus, const struct sfp_eeprom_id *id);
void sfp_module_remove(struct sfp_bus *bus);
int sfp_module_start(struct sfp_bus *bus);
void sfp_module_stop(struct sfp_bus *bus);
int sfp_link_configure(struct sfp_bus *bus, const struct sfp_eeprom_id *id);
struct sfp_bus *sfp_register_socket(struct device *dev, struct sfp *sfp,
const struct sfp_socket_ops *ops);
......
......@@ -275,6 +275,61 @@ struct sfp_diag {
__be16 cal_v_offset;
} __packed;
/* SFF8024 defined constants */
enum {
SFF8024_ID_UNK = 0x00,
SFF8024_ID_SFF_8472 = 0x02,
SFF8024_ID_SFP = 0x03,
SFF8024_ID_DWDM_SFP = 0x0b,
SFF8024_ID_QSFP_8438 = 0x0c,
SFF8024_ID_QSFP_8436_8636 = 0x0d,
SFF8024_ID_QSFP28_8636 = 0x11,
SFF8024_ENCODING_UNSPEC = 0x00,
SFF8024_ENCODING_8B10B = 0x01,
SFF8024_ENCODING_4B5B = 0x02,
SFF8024_ENCODING_NRZ = 0x03,
SFF8024_ENCODING_8472_MANCHESTER= 0x04,
SFF8024_ENCODING_8472_SONET = 0x05,
SFF8024_ENCODING_8472_64B66B = 0x06,
SFF8024_ENCODING_8436_MANCHESTER= 0x06,
SFF8024_ENCODING_8436_SONET = 0x04,
SFF8024_ENCODING_8436_64B66B = 0x05,
SFF8024_ENCODING_256B257B = 0x07,
SFF8024_ENCODING_PAM4 = 0x08,
SFF8024_CONNECTOR_UNSPEC = 0x00,
/* codes 01-05 not supportable on SFP, but some modules have single SC */
SFF8024_CONNECTOR_SC = 0x01,
SFF8024_CONNECTOR_FIBERJACK = 0x06,
SFF8024_CONNECTOR_LC = 0x07,
SFF8024_CONNECTOR_MT_RJ = 0x08,
SFF8024_CONNECTOR_MU = 0x09,
SFF8024_CONNECTOR_SG = 0x0a,
SFF8024_CONNECTOR_OPTICAL_PIGTAIL= 0x0b,
SFF8024_CONNECTOR_MPO_1X12 = 0x0c,
SFF8024_CONNECTOR_MPO_2X16 = 0x0d,
SFF8024_CONNECTOR_HSSDC_II = 0x20,
SFF8024_CONNECTOR_COPPER_PIGTAIL= 0x21,
SFF8024_CONNECTOR_RJ45 = 0x22,
SFF8024_CONNECTOR_NOSEPARATE = 0x23,
SFF8024_CONNECTOR_MXC_2X16 = 0x24,
SFF8024_ECC_UNSPEC = 0x00,
SFF8024_ECC_100G_25GAUI_C2M_AOC = 0x01,
SFF8024_ECC_100GBASE_SR4_25GBASE_SR = 0x02,
SFF8024_ECC_100GBASE_LR4_25GBASE_LR = 0x03,
SFF8024_ECC_100GBASE_ER4_25GBASE_ER = 0x04,
SFF8024_ECC_100GBASE_SR10 = 0x05,
SFF8024_ECC_100GBASE_CR4 = 0x0b,
SFF8024_ECC_25GBASE_CR_S = 0x0c,
SFF8024_ECC_25GBASE_CR_N = 0x0d,
SFF8024_ECC_10GBASE_T_SFI = 0x16,
SFF8024_ECC_10GBASE_T_SR = 0x1c,
SFF8024_ECC_5GBASE_T = 0x1d,
SFF8024_ECC_2_5GBASE_T = 0x1e,
};
/* SFP EEPROM registers */
enum {
SFP_PHYS_ID = 0x00,
......@@ -309,34 +364,7 @@ enum {
SFP_SFF8472_COMPLIANCE = 0x5e,
SFP_CC_EXT = 0x5f,
SFP_PHYS_ID_SFF = 0x02,
SFP_PHYS_ID_SFP = 0x03,
SFP_PHYS_EXT_ID_SFP = 0x04,
SFP_CONNECTOR_UNSPEC = 0x00,
/* codes 01-05 not supportable on SFP, but some modules have single SC */
SFP_CONNECTOR_SC = 0x01,
SFP_CONNECTOR_FIBERJACK = 0x06,
SFP_CONNECTOR_LC = 0x07,
SFP_CONNECTOR_MT_RJ = 0x08,
SFP_CONNECTOR_MU = 0x09,
SFP_CONNECTOR_SG = 0x0a,
SFP_CONNECTOR_OPTICAL_PIGTAIL = 0x0b,
SFP_CONNECTOR_MPO_1X12 = 0x0c,
SFP_CONNECTOR_MPO_2X16 = 0x0d,
SFP_CONNECTOR_HSSDC_II = 0x20,
SFP_CONNECTOR_COPPER_PIGTAIL = 0x21,
SFP_CONNECTOR_RJ45 = 0x22,
SFP_CONNECTOR_NOSEPARATE = 0x23,
SFP_CONNECTOR_MXC_2X16 = 0x24,
SFP_ENCODING_UNSPEC = 0x00,
SFP_ENCODING_8B10B = 0x01,
SFP_ENCODING_4B5B = 0x02,
SFP_ENCODING_NRZ = 0x03,
SFP_ENCODING_8472_MANCHESTER = 0x04,
SFP_ENCODING_8472_SONET = 0x05,
SFP_ENCODING_8472_64B66B = 0x06,
SFP_ENCODING_256B257B = 0x07,
SFP_ENCODING_PAM4 = 0x08,
SFP_OPTIONS_HIGH_POWER_LEVEL = BIT(13),
SFP_OPTIONS_PAGING_A2 = BIT(12),
SFP_OPTIONS_RETIMER = BIT(11),
......@@ -479,6 +507,8 @@ struct sfp_bus;
* @module_insert: called after a module has been detected to determine
* whether the module is supported for the upstream device.
* @module_remove: called after the module has been removed.
* @module_start: called after the PHY probe step
* @module_stop: called before the PHY is removed
* @link_down: called when the link is non-operational for whatever
* reason.
* @link_up: called when the link is operational.
......@@ -492,6 +522,8 @@ struct sfp_upstream_ops {
void (*detach)(void *priv, struct sfp_bus *bus);
int (*module_insert)(void *priv, const struct sfp_eeprom_id *id);
void (*module_remove)(void *priv);
int (*module_start)(void *priv);
void (*module_stop)(void *priv);
void (*link_down)(void *priv);
void (*link_up)(void *priv);
int (*connect_phy)(void *priv, struct phy_device *);
......@@ -501,10 +533,10 @@ struct sfp_upstream_ops {
#if IS_ENABLED(CONFIG_SFP)
int sfp_parse_port(struct sfp_bus *bus, const struct sfp_eeprom_id *id,
unsigned long *support);
bool sfp_may_have_phy(struct sfp_bus *bus, const struct sfp_eeprom_id *id);
void sfp_parse_support(struct sfp_bus *bus, const struct sfp_eeprom_id *id,
unsigned long *support);
phy_interface_t sfp_select_interface(struct sfp_bus *bus,
const struct sfp_eeprom_id *id,
unsigned long *link_modes);
int sfp_get_module_info(struct sfp_bus *bus, struct ethtool_modinfo *modinfo);
......@@ -525,6 +557,12 @@ static inline int sfp_parse_port(struct sfp_bus *bus,
return PORT_OTHER;
}
static inline bool sfp_may_have_phy(struct sfp_bus *bus,
const struct sfp_eeprom_id *id)
{
return false;
}
static inline void sfp_parse_support(struct sfp_bus *bus,
const struct sfp_eeprom_id *id,
unsigned long *support)
......@@ -532,7 +570,6 @@ static inline void sfp_parse_support(struct sfp_bus *bus,
}
static inline phy_interface_t sfp_select_interface(struct sfp_bus *bus,
const struct sfp_eeprom_id *id,
unsigned long *link_modes)
{
return PHY_INTERFACE_MODE_NA;
......
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