Commit b67545fd authored by Kukjin Kim's avatar Kukjin Kim

ARM: EXYNOS: add initial setup-i2c0 for EXYNOS5

In all of Samsung platform, the setup-i2c0.c file for I2C channel 0
is always compiled. So when supporting new SoC,it should be updated
for it. Since EXYNOS5 GPIO will be supported after this, there is no
setup gpio in there now. It will be implemented with that, of course.
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 87b3c6ef
...@@ -52,7 +52,7 @@ obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o ...@@ -52,7 +52,7 @@ obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o
obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o
obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o obj-$(CONFIG_ARCH_EXYNOS) += setup-i2c0.o
obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o
obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o
obj-$(CONFIG_EXYNOS4_SETUP_I2C1) += setup-i2c1.o obj-$(CONFIG_EXYNOS4_SETUP_I2C1) += setup-i2c1.o
......
/* /*
* linux/arch/arm/mach-exynos4/setup-i2c0.c * Copyright (c) 2009-2012 Samsung Electronics Co., Ltd.
*
* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/ * http://www.samsung.com/
* *
* I2C0 GPIO configuration. * I2C0 GPIO configuration.
...@@ -18,9 +16,14 @@ struct platform_device; /* don't need the contents */ ...@@ -18,9 +16,14 @@ struct platform_device; /* don't need the contents */
#include <linux/gpio.h> #include <linux/gpio.h>
#include <plat/iic.h> #include <plat/iic.h>
#include <plat/gpio-cfg.h> #include <plat/gpio-cfg.h>
#include <plat/cpu.h>
void s3c_i2c0_cfg_gpio(struct platform_device *dev) void s3c_i2c0_cfg_gpio(struct platform_device *dev)
{ {
if (soc_is_exynos5250())
/* will be implemented with gpio function */
return;
s3c_gpio_cfgall_range(EXYNOS4_GPD1(0), 2, s3c_gpio_cfgall_range(EXYNOS4_GPD1(0), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
} }
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