Commit b701542d authored by Andrey Grodzovsky's avatar Andrey Grodzovsky Committed by Alex Deucher

drm/amd/display: fix >340 Mhz with deep color pipe split no display

 the input to HW formula needs to take care the deep color.
Signed-off-by: default avatarCharlene Liu <charlene.liu@amd.com>
Reviewed-by: default avatarCharlene Liu <Charlene.Liu@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e51bf71e
...@@ -856,7 +856,18 @@ bool dcn_validate_bandwidth( ...@@ -856,7 +856,18 @@ bool dcn_validate_bandwidth(
- pipe->stream->timing.v_front_porch; - pipe->stream->timing.v_front_porch;
v->vactive[input_idx] = pipe->stream->timing.v_addressable; v->vactive[input_idx] = pipe->stream->timing.v_addressable;
v->pixel_clock[input_idx] = pipe->stream->timing.pix_clk_khz / 1000.0f; v->pixel_clock[input_idx] = pipe->stream->timing.pix_clk_khz / 1000.0f;
if (pipe->stream->sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A) {
switch (pipe->stream->timing.display_color_depth) {
case COLOR_DEPTH_101010:
v->pixel_clock[input_idx] = (v->pixel_clock[input_idx] * 30) / 24;
break;
case COLOR_DEPTH_121212:
v->pixel_clock[input_idx] = (v->pixel_clock[input_idx] * 36) / 24;
break;
default:
break;
}
}
if (!pipe->surface){ if (!pipe->surface){
v->dcc_enable[input_idx] = dcn_bw_yes; v->dcc_enable[input_idx] = dcn_bw_yes;
......
...@@ -1657,8 +1657,6 @@ static void set_avi_info_frame( ...@@ -1657,8 +1657,6 @@ static void set_avi_info_frame(
color_space == COLOR_SPACE_YCBCR601_LIMITED) color_space == COLOR_SPACE_YCBCR601_LIMITED)
hdmi_info->bits.C0_C1 = COLORIMETRY_ITU601; hdmi_info->bits.C0_C1 = COLORIMETRY_ITU601;
else { else {
if (stream->timing.pixel_encoding != PIXEL_ENCODING_RGB)
BREAK_TO_DEBUGGER();
hdmi_info->bits.C0_C1 = COLORIMETRY_NO_DATA; hdmi_info->bits.C0_C1 = COLORIMETRY_NO_DATA;
} }
if (color_space == COLOR_SPACE_2020_RGB_FULLRANGE || if (color_space == COLOR_SPACE_2020_RGB_FULLRANGE ||
......
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