MIPS: Alchemy: Fix AU1100 interrupt numbers off-by-one

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

MIPS: Alchemy: Fix AU1100 interrupt numbers off-by-one
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
b7863ee1 · Manuel Lauss · Ralf Baechle · bcf11801 · b7863ee1
Commit b7863ee1 authored Mar 31, 2009 by Manuel Lauss Committed by Ralf Baechle May 14, 2009
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arch/mips/include/asm/mach-au1x00/au1000.h arch/mips/include/asm/mach-au1x00/au1000.h +1 -1

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--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -715,7 +715,7 @@ enum soc_au1500_ints {
 #ifdef CONFIG_SOC_AU1100
 enum soc_au1100_ints {
 	AU1100_FIRST_INT	= MIPS_CPU_IRQ_BASE + 8,
-	AU1100_UART0_INT,
+	AU1100_UART0_INT	= AU1100_FIRST_INT,
 	AU1100_UART1_INT,
 	AU1100_SD_INT,
 	AU1100_UART3_INT,