Commit b7e8c939 authored by Stefan Agner's avatar Stefan Agner Committed by Russell King

ARM: 8845/1: use unified assembler in c files

Use unified assembler syntax (UAL) in inline assembler. Divided
syntax is considered deprecated. This will also allow to build
the kernel using LLVM's integrated assembler.

When compiling non-Thumb2 GCC always emits a ".syntax divided"
at the beginning of the inline assembly which makes the
assembler fail. Since GCC 5 there is the -masm-syntax-unified
GCC option which make GCC assume unified syntax asm and hence
emits ".syntax unified" even in ARM mode. However, the option
is broken since GCC version 6 (see GCC PR88648 [1]). Work
around by adding ".syntax unified" as part of the inline
assembly.

[0] https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html#index-masm-syntax-unified
[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88648Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
Acked-by: default avatarNicolas Pitre <nico@linaro.org>
Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
parent e44fc388
...@@ -45,6 +45,7 @@ static void mc_copy_user_page(void *from, void *to) ...@@ -45,6 +45,7 @@ static void mc_copy_user_page(void *from, void *to)
int tmp; int tmp;
asm volatile ("\ asm volatile ("\
.syntax unified\n\
ldmia %0!, {r2, r3, ip, lr} @ 4\n\ ldmia %0!, {r2, r3, ip, lr} @ 4\n\
1: mcr p15, 0, %1, c7, c6, 1 @ 1 invalidate D line\n\ 1: mcr p15, 0, %1, c7, c6, 1 @ 1 invalidate D line\n\
stmia %1!, {r2, r3, ip, lr} @ 4\n\ stmia %1!, {r2, r3, ip, lr} @ 4\n\
...@@ -56,7 +57,7 @@ static void mc_copy_user_page(void *from, void *to) ...@@ -56,7 +57,7 @@ static void mc_copy_user_page(void *from, void *to)
ldmia %0!, {r2, r3, ip, lr} @ 4\n\ ldmia %0!, {r2, r3, ip, lr} @ 4\n\
subs %2, %2, #1 @ 1\n\ subs %2, %2, #1 @ 1\n\
stmia %1!, {r2, r3, ip, lr} @ 4\n\ stmia %1!, {r2, r3, ip, lr} @ 4\n\
ldmneia %0!, {r2, r3, ip, lr} @ 4\n\ ldmiane %0!, {r2, r3, ip, lr} @ 4\n\
bne 1b @ " bne 1b @ "
: "+&r" (from), "+&r" (to), "=&r" (tmp) : "+&r" (from), "+&r" (to), "=&r" (tmp)
: "2" (PAGE_SIZE / 64) : "2" (PAGE_SIZE / 64)
......
...@@ -27,6 +27,7 @@ static void v4wb_copy_user_page(void *kto, const void *kfrom) ...@@ -27,6 +27,7 @@ static void v4wb_copy_user_page(void *kto, const void *kfrom)
int tmp; int tmp;
asm volatile ("\ asm volatile ("\
.syntax unified\n\
ldmia %1!, {r3, r4, ip, lr} @ 4\n\ ldmia %1!, {r3, r4, ip, lr} @ 4\n\
1: mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\ 1: mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\
stmia %0!, {r3, r4, ip, lr} @ 4\n\ stmia %0!, {r3, r4, ip, lr} @ 4\n\
...@@ -38,7 +39,7 @@ static void v4wb_copy_user_page(void *kto, const void *kfrom) ...@@ -38,7 +39,7 @@ static void v4wb_copy_user_page(void *kto, const void *kfrom)
ldmia %1!, {r3, r4, ip, lr} @ 4\n\ ldmia %1!, {r3, r4, ip, lr} @ 4\n\
subs %2, %2, #1 @ 1\n\ subs %2, %2, #1 @ 1\n\
stmia %0!, {r3, r4, ip, lr} @ 4\n\ stmia %0!, {r3, r4, ip, lr} @ 4\n\
ldmneia %1!, {r3, r4, ip, lr} @ 4\n\ ldmiane %1!, {r3, r4, ip, lr} @ 4\n\
bne 1b @ 1\n\ bne 1b @ 1\n\
mcr p15, 0, %1, c7, c10, 4 @ 1 drain WB" mcr p15, 0, %1, c7, c10, 4 @ 1 drain WB"
: "+&r" (kto), "+&r" (kfrom), "=&r" (tmp) : "+&r" (kto), "+&r" (kfrom), "=&r" (tmp)
......
...@@ -25,6 +25,7 @@ static void v4wt_copy_user_page(void *kto, const void *kfrom) ...@@ -25,6 +25,7 @@ static void v4wt_copy_user_page(void *kto, const void *kfrom)
int tmp; int tmp;
asm volatile ("\ asm volatile ("\
.syntax unified\n\
ldmia %1!, {r3, r4, ip, lr} @ 4\n\ ldmia %1!, {r3, r4, ip, lr} @ 4\n\
1: stmia %0!, {r3, r4, ip, lr} @ 4\n\ 1: stmia %0!, {r3, r4, ip, lr} @ 4\n\
ldmia %1!, {r3, r4, ip, lr} @ 4+1\n\ ldmia %1!, {r3, r4, ip, lr} @ 4+1\n\
...@@ -34,7 +35,7 @@ static void v4wt_copy_user_page(void *kto, const void *kfrom) ...@@ -34,7 +35,7 @@ static void v4wt_copy_user_page(void *kto, const void *kfrom)
ldmia %1!, {r3, r4, ip, lr} @ 4\n\ ldmia %1!, {r3, r4, ip, lr} @ 4\n\
subs %2, %2, #1 @ 1\n\ subs %2, %2, #1 @ 1\n\
stmia %0!, {r3, r4, ip, lr} @ 4\n\ stmia %0!, {r3, r4, ip, lr} @ 4\n\
ldmneia %1!, {r3, r4, ip, lr} @ 4\n\ ldmiane %1!, {r3, r4, ip, lr} @ 4\n\
bne 1b @ 1\n\ bne 1b @ 1\n\
mcr p15, 0, %2, c7, c7, 0 @ flush ID cache" mcr p15, 0, %2, c7, c7, 0 @ flush ID cache"
: "+&r" (kto), "+&r" (kfrom), "=&r" (tmp) : "+&r" (kto), "+&r" (kfrom), "=&r" (tmp)
......
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