Commit b7f69d9d authored by Viresh Kumar's avatar Viresh Kumar Committed by Vinod Koul

dmaengine/amba-pl08x: Add support for sg len greater than one for slave transfers

Untill now, sg_len greater than one is not supported. This patch adds support to
do that.

Note: Still, if peripheral is flow controller, sg_len can't be greater that one.
Signed-off-by: default avatarViresh Kumar <viresh.kumar@st.com>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent 937bb6e4
This diff is collapsed.
...@@ -105,13 +105,25 @@ struct pl08x_phy_chan { ...@@ -105,13 +105,25 @@ struct pl08x_phy_chan {
struct pl08x_dma_chan *serving; struct pl08x_dma_chan *serving;
}; };
/**
* struct pl08x_sg - structure containing data per sg
* @src_addr: src address of sg
* @dst_addr: dst address of sg
* @len: transfer len in bytes
* @node: node for txd's dsg_list
*/
struct pl08x_sg {
dma_addr_t src_addr;
dma_addr_t dst_addr;
size_t len;
struct list_head node;
};
/** /**
* struct pl08x_txd - wrapper for struct dma_async_tx_descriptor * struct pl08x_txd - wrapper for struct dma_async_tx_descriptor
* @tx: async tx descriptor * @tx: async tx descriptor
* @node: node for txd list for channels * @node: node for txd list for channels
* @src_addr: src address of txd * @dsg_list: list of children sg's
* @dst_addr: dst address of txd
* @len: transfer len in bytes
* @direction: direction of transfer * @direction: direction of transfer
* @llis_bus: DMA memory address (physical) start for the LLIs * @llis_bus: DMA memory address (physical) start for the LLIs
* @llis_va: virtual memory address start for the LLIs * @llis_va: virtual memory address start for the LLIs
...@@ -121,10 +133,8 @@ struct pl08x_phy_chan { ...@@ -121,10 +133,8 @@ struct pl08x_phy_chan {
struct pl08x_txd { struct pl08x_txd {
struct dma_async_tx_descriptor tx; struct dma_async_tx_descriptor tx;
struct list_head node; struct list_head node;
struct list_head dsg_list;
enum dma_data_direction direction; enum dma_data_direction direction;
dma_addr_t src_addr;
dma_addr_t dst_addr;
size_t len;
dma_addr_t llis_bus; dma_addr_t llis_bus;
struct pl08x_lli *llis_va; struct pl08x_lli *llis_va;
/* Default cctl value for LLIs */ /* Default cctl value for LLIs */
......
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