Commit b8155fe1 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'powerpc-4.5-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc fixes from Michael Ellerman:
 - cxl: Fix PSL timebase synchronization detection from Frederic Barrat
 - Fix oops when destroying hw_breakpoint event from Ravi Bangoria
 - Avoid lbarx on e5500 from Scott Wood

* tag 'powerpc-4.5-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/fsl-book3e: Avoid lbarx on e5500
  powerpc/hw_breakpoint: Fix oops when destroying hw_breakpoint event
  cxl: Fix PSL timebase synchronization detection
parents 7addb7fa 37c5e942
...@@ -109,8 +109,9 @@ void arch_unregister_hw_breakpoint(struct perf_event *bp) ...@@ -109,8 +109,9 @@ void arch_unregister_hw_breakpoint(struct perf_event *bp)
* If the breakpoint is unregistered between a hw_breakpoint_handler() * If the breakpoint is unregistered between a hw_breakpoint_handler()
* and the single_step_dabr_instruction(), then cleanup the breakpoint * and the single_step_dabr_instruction(), then cleanup the breakpoint
* restoration variables to prevent dangling pointers. * restoration variables to prevent dangling pointers.
* FIXME, this should not be using bp->ctx at all! Sayeth peterz.
*/ */
if (bp->ctx && bp->ctx->task) if (bp->ctx && bp->ctx->task && bp->ctx->task != ((void *)-1L))
bp->ctx->task->thread.last_hit_ubp = NULL; bp->ctx->task->thread.last_hit_ubp = NULL;
} }
......
...@@ -8,6 +8,8 @@ ...@@ -8,6 +8,8 @@
#include <linux/mm.h> #include <linux/mm.h>
#include <linux/hugetlb.h> #include <linux/hugetlb.h>
#include <asm/mmu.h>
#ifdef CONFIG_PPC_FSL_BOOK3E #ifdef CONFIG_PPC_FSL_BOOK3E
#ifdef CONFIG_PPC64 #ifdef CONFIG_PPC64
static inline int tlb1_next(void) static inline int tlb1_next(void)
...@@ -60,6 +62,14 @@ static inline void book3e_tlb_lock(void) ...@@ -60,6 +62,14 @@ static inline void book3e_tlb_lock(void)
unsigned long tmp; unsigned long tmp;
int token = smp_processor_id() + 1; int token = smp_processor_id() + 1;
/*
* Besides being unnecessary in the absence of SMT, this
* check prevents trying to do lbarx/stbcx. on e5500 which
* doesn't implement either feature.
*/
if (!cpu_has_feature(CPU_FTR_SMT))
return;
asm volatile("1: lbarx %0, 0, %1;" asm volatile("1: lbarx %0, 0, %1;"
"cmpwi %0, 0;" "cmpwi %0, 0;"
"bne 2f;" "bne 2f;"
...@@ -80,6 +90,9 @@ static inline void book3e_tlb_unlock(void) ...@@ -80,6 +90,9 @@ static inline void book3e_tlb_unlock(void)
{ {
struct paca_struct *paca = get_paca(); struct paca_struct *paca = get_paca();
if (!cpu_has_feature(CPU_FTR_SMT))
return;
isync(); isync();
paca->tcd_ptr->lock = 0; paca->tcd_ptr->lock = 0;
} }
......
...@@ -415,7 +415,7 @@ static int cxl_setup_psl_timebase(struct cxl *adapter, struct pci_dev *dev) ...@@ -415,7 +415,7 @@ static int cxl_setup_psl_timebase(struct cxl *adapter, struct pci_dev *dev)
delta = mftb() - psl_tb; delta = mftb() - psl_tb;
if (delta < 0) if (delta < 0)
delta = -delta; delta = -delta;
} while (cputime_to_usecs(delta) > 16); } while (tb_to_ns(delta) > 16000);
return 0; return 0;
} }
......
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