Commit b8af1006 authored by Ilkka Koskinen's avatar Ilkka Koskinen Committed by Arnaldo Carvalho de Melo

perf vendor events arm64: Remove L1D_CACHE_LMISS from AmpereOne list

amperene/cache.json file tried to include L1D_CACHE_LMISS while it
doesn't exist in common-and-microarch.json. While this bug doesn't seem to
cause issue in newer kernels with jevents.py script, it prevents building
older perf tools with the backported patch.

Fixes: a9650b7f ("perf vendor events arm64: Add AmpereOne core PMU events")
Reported-by: default avatarDave Kleikamp <dave.kleikamp@oracle.com>
Reviewed-by: default avatarIan Rogers <irogers@google.com>
Reviewed-by: default avatarJohn Garry <john.g.garry@oracle.com>
Signed-off-by: default avatarIlkka Koskinen <ilkka@os.amperecomputing.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ilkka Koskinen <ilkka@os.amperecomputing.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@arm.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Closes: https://lore.kernel.org/all/76bb2e47-ce44-76ae-838e-53279047084d@oracle.com/
Link: https://lore.kernel.org/r/20230803211331.140553-2-ilkka@os.amperecomputing.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 7298e876
...@@ -92,9 +92,6 @@ ...@@ -92,9 +92,6 @@
{ {
"ArchStdEvent": "L1D_CACHE_LMISS_RD" "ArchStdEvent": "L1D_CACHE_LMISS_RD"
}, },
{
"ArchStdEvent": "L1D_CACHE_LMISS"
},
{ {
"ArchStdEvent": "L1I_CACHE_LMISS" "ArchStdEvent": "L1I_CACHE_LMISS"
}, },
......
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