Commit b905c34a authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson

ARM: dts: qcom-msm8974*: Fix UART naming

It's either uart10, or blsp2_uart4, not blsp2_uart10, as there aren't 10
UARTs on BLSP2. Fix the naming to align with what's done in arm64/qcom.
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-4-konrad.dybcio@somainline.org
parent eba5e620
......@@ -12,7 +12,7 @@ / {
aliases {
serial0 = &blsp1_uart1;
serial1 = &blsp2_uart10;
serial1 = &blsp2_uart4;
};
chosen {
......@@ -395,7 +395,7 @@ shutdown {
};
};
blsp2_uart10_pin_a: blsp2-uart10-pin-active {
blsp2_uart4_pin_a: blsp2-uart4-pin-active {
tx {
pins = "gpio53";
function = "blsp_uart10";
......@@ -473,7 +473,7 @@ serial@f9960000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&blsp2_uart10_pin_a>;
pinctrl-0 = <&blsp2_uart4_pin_a>;
bluetooth {
compatible = "brcm,bcm43438-bt";
......
......@@ -358,13 +358,13 @@ serial@f991e000 {
status = "okay";
};
/* blsp2_uart8 */
/* blsp2_uart2 */
serial@f995e000 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&blsp2_uart8_pins_active>;
pinctrl-1 = <&blsp2_uart8_pins_sleep>;
pinctrl-0 = <&blsp2_uart2_pins_active>;
pinctrl-1 = <&blsp2_uart2_pins_sleep>;
bluetooth {
compatible = "brcm,bcm43540-bt";
......@@ -380,14 +380,14 @@ bluetooth {
};
pinctrl@fd510000 {
blsp2_uart8_pins_active: blsp2-uart8-pins-active {
blsp2_uart2_pins_active: blsp2-uart2-pins-active {
pins = "gpio45", "gpio46", "gpio47", "gpio48";
function = "blsp_uart8";
drive-strength = <8>;
bias-disable;
};
blsp2_uart8_pins_sleep: blsp2-uart8-pins-sleep {
blsp2_uart2_pins_sleep: blsp2-uart2-pins-sleep {
pins = "gpio45", "gpio46", "gpio47", "gpio48";
function = "gpio";
drive-strength = <2>;
......
......@@ -11,7 +11,7 @@ / {
aliases {
serial0 = &blsp1_uart2;
serial1 = &blsp2_uart7;
serial1 = &blsp2_uart1;
};
chosen {
......
......@@ -713,7 +713,7 @@ blsp1_uart2: serial@f991e000 {
status = "disabled";
};
blsp2_uart7: serial@f995d000 {
blsp2_uart1: serial@f995d000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0xf995d000 0x1000>;
interrupts = <GIC_SPI 113 IRQ_TYPE_NONE>;
......@@ -722,7 +722,7 @@ blsp2_uart7: serial@f995d000 {
status = "disabled";
};
blsp2_uart8: serial@f995e000 {
blsp2_uart2: serial@f995e000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0xf995e000 0x1000>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
......@@ -731,7 +731,7 @@ blsp2_uart8: serial@f995e000 {
status = "disabled";
};
blsp2_uart10: serial@f9960000 {
blsp2_uart4: serial@f9960000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0xf9960000 0x1000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
......
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