Commit b9bc8811 authored by Robin Murphy's avatar Robin Murphy Committed by Will Deacon

Docs: dt: document ARM SMMUv3 generic binding usage

We're about to ratify our use of the generic binding, so document it.

CC: Rob Herring <robh+dt@kernel.org>
CC: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarRobin Murphy <robin.murphy@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 57f98d2f
...@@ -27,6 +27,12 @@ the PCIe specification. ...@@ -27,6 +27,12 @@ the PCIe specification.
* "cmdq-sync" - CMD_SYNC complete * "cmdq-sync" - CMD_SYNC complete
* "gerror" - Global Error activated * "gerror" - Global Error activated
- #iommu-cells : See the generic IOMMU binding described in
devicetree/bindings/pci/pci-iommu.txt
for details. For SMMUv3, must be 1, with each cell
describing a single stream ID. All possible stream
IDs which a device may emit must be described.
** SMMUv3 optional properties: ** SMMUv3 optional properties:
- dma-coherent : Present if DMA operations made by the SMMU (page - dma-coherent : Present if DMA operations made by the SMMU (page
...@@ -54,6 +60,6 @@ the PCIe specification. ...@@ -54,6 +60,6 @@ the PCIe specification.
<GIC_SPI 79 IRQ_TYPE_EDGE_RISING>; <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "eventq", "priq", "cmdq-sync", "gerror"; interrupt-names = "eventq", "priq", "cmdq-sync", "gerror";
dma-coherent; dma-coherent;
#iommu-cells = <0>; #iommu-cells = <1>;
msi-parent = <&its 0xff0000>; msi-parent = <&its 0xff0000>;
}; };
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment