Commit ba787c07 authored by Ching-Te Ku's avatar Ching-Te Ku Committed by Kalle Valo

rtw89: coex: Move Wi-Fi firmware coexistence matching version to chip

To configure the different chips with different coexistence version,
separated the firmware feature version matching number is necessary.
Signed-off-by: default avatarChing-Te Ku <ku920601@realtek.com>
Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220725023509.43114-3-pkshih@realtek.com
parent 38ede035
...@@ -871,6 +871,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev, ...@@ -871,6 +871,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
struct rtw89_btc_btf_fwinfo *pfwinfo, struct rtw89_btc_btf_fwinfo *pfwinfo,
u8 *prptbuf, u32 index) u8 *prptbuf, u32 index)
{ {
const struct rtw89_chip_info *chip = rtwdev->chip;
struct rtw89_btc *btc = &rtwdev->btc; struct rtw89_btc *btc = &rtwdev->btc;
struct rtw89_btc_dm *dm = &btc->dm; struct rtw89_btc_dm *dm = &btc->dm;
struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; struct rtw89_btc_rpt_cmn_info *pcinfo = NULL;
...@@ -908,7 +909,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev, ...@@ -908,7 +909,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
pcinfo = &pfwinfo->rpt_ctrl.cinfo; pcinfo = &pfwinfo->rpt_ctrl.cinfo;
pfinfo = (u8 *)(&pfwinfo->rpt_ctrl.finfo); pfinfo = (u8 *)(&pfwinfo->rpt_ctrl.finfo);
pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo); pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo);
pcinfo->req_fver = BTCRPT_VER; pcinfo->req_fver = chip->fcxbtcrpt_ver;
pcinfo->rx_len = rpt_len; pcinfo->rx_len = rpt_len;
pcinfo->rx_cnt++; pcinfo->rx_cnt++;
break; break;
...@@ -916,7 +917,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev, ...@@ -916,7 +917,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
pcinfo = &pfwinfo->rpt_fbtc_tdma.cinfo; pcinfo = &pfwinfo->rpt_fbtc_tdma.cinfo;
pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_tdma.finfo); pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_tdma.finfo);
pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_tdma.finfo); pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_tdma.finfo);
pcinfo->req_fver = FCXTDMA_VER; pcinfo->req_fver = chip->fcxtdma_ver;
pcinfo->rx_len = rpt_len; pcinfo->rx_len = rpt_len;
pcinfo->rx_cnt++; pcinfo->rx_cnt++;
break; break;
...@@ -924,7 +925,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev, ...@@ -924,7 +925,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
pcinfo = &pfwinfo->rpt_fbtc_slots.cinfo; pcinfo = &pfwinfo->rpt_fbtc_slots.cinfo;
pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_slots.finfo); pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_slots.finfo);
pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_slots.finfo); pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_slots.finfo);
pcinfo->req_fver = FCXSLOTS_VER; pcinfo->req_fver = chip->fcxslots_ver;
pcinfo->rx_len = rpt_len; pcinfo->rx_len = rpt_len;
pcinfo->rx_cnt++; pcinfo->rx_cnt++;
break; break;
...@@ -934,7 +935,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev, ...@@ -934,7 +935,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
pcysta_le32 = &pfwinfo->rpt_fbtc_cysta.finfo; pcysta_le32 = &pfwinfo->rpt_fbtc_cysta.finfo;
rtw89_btc_fbtc_cysta_to_cpu(pcysta_le32, pcysta); rtw89_btc_fbtc_cysta_to_cpu(pcysta_le32, pcysta);
pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo); pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo);
pcinfo->req_fver = FCXCYSTA_VER; pcinfo->req_fver = chip->fcxcysta_ver;
pcinfo->rx_len = rpt_len; pcinfo->rx_len = rpt_len;
pcinfo->rx_cnt++; pcinfo->rx_cnt++;
break; break;
...@@ -943,7 +944,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev, ...@@ -943,7 +944,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_step.finfo); pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_step.finfo);
pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_step.finfo.step[0]) * pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_step.finfo.step[0]) *
trace_step + 8; trace_step + 8;
pcinfo->req_fver = FCXSTEP_VER; pcinfo->req_fver = chip->fcxstep_ver;
pcinfo->rx_len = rpt_len; pcinfo->rx_len = rpt_len;
pcinfo->rx_cnt++; pcinfo->rx_cnt++;
break; break;
...@@ -951,7 +952,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev, ...@@ -951,7 +952,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
pcinfo = &pfwinfo->rpt_fbtc_nullsta.cinfo; pcinfo = &pfwinfo->rpt_fbtc_nullsta.cinfo;
pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_nullsta.finfo); pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_nullsta.finfo);
pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_nullsta.finfo); pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_nullsta.finfo);
pcinfo->req_fver = FCXNULLSTA_VER; pcinfo->req_fver = chip->fcxnullsta_ver;
pcinfo->rx_len = rpt_len; pcinfo->rx_len = rpt_len;
pcinfo->rx_cnt++; pcinfo->rx_cnt++;
break; break;
...@@ -959,7 +960,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev, ...@@ -959,7 +960,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo; pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo;
pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_mregval.finfo); pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_mregval.finfo);
pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_mregval.finfo); pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_mregval.finfo);
pcinfo->req_fver = FCXMREG_VER; pcinfo->req_fver = chip->fcxmreg_ver;
pcinfo->rx_len = rpt_len; pcinfo->rx_len = rpt_len;
pcinfo->rx_cnt++; pcinfo->rx_cnt++;
break; break;
...@@ -967,7 +968,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev, ...@@ -967,7 +968,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
pcinfo = &pfwinfo->rpt_fbtc_gpio_dbg.cinfo; pcinfo = &pfwinfo->rpt_fbtc_gpio_dbg.cinfo;
pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_gpio_dbg.finfo); pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_gpio_dbg.finfo);
pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_gpio_dbg.finfo); pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_gpio_dbg.finfo);
pcinfo->req_fver = FCXGPIODBG_VER; pcinfo->req_fver = chip->fcxgpiodbg_ver;
pcinfo->rx_len = rpt_len; pcinfo->rx_len = rpt_len;
pcinfo->rx_cnt++; pcinfo->rx_cnt++;
break; break;
...@@ -975,7 +976,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev, ...@@ -975,7 +976,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
pcinfo = &pfwinfo->rpt_fbtc_btver.cinfo; pcinfo = &pfwinfo->rpt_fbtc_btver.cinfo;
pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_btver.finfo); pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_btver.finfo);
pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btver.finfo); pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btver.finfo);
pcinfo->req_fver = FCX_BTVER_VER; pcinfo->req_fver = chip->fcxbtver_ver;
pcinfo->rx_len = rpt_len; pcinfo->rx_len = rpt_len;
pcinfo->rx_cnt++; pcinfo->rx_cnt++;
break; break;
...@@ -983,7 +984,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev, ...@@ -983,7 +984,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
pcinfo = &pfwinfo->rpt_fbtc_btscan.cinfo; pcinfo = &pfwinfo->rpt_fbtc_btscan.cinfo;
pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_btscan.finfo); pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_btscan.finfo);
pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btscan.finfo); pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btscan.finfo);
pcinfo->req_fver = FCX_BTSCAN_VER; pcinfo->req_fver = chip->fcxbtscan_ver;
pcinfo->rx_len = rpt_len; pcinfo->rx_len = rpt_len;
pcinfo->rx_cnt++; pcinfo->rx_cnt++;
break; break;
...@@ -991,7 +992,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev, ...@@ -991,7 +992,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
pcinfo = &pfwinfo->rpt_fbtc_btafh.cinfo; pcinfo = &pfwinfo->rpt_fbtc_btafh.cinfo;
pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_btafh.finfo); pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_btafh.finfo);
pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btafh.finfo); pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btafh.finfo);
pcinfo->req_fver = FCX_BTAFH_VER; pcinfo->req_fver = chip->fcxbtafh_ver;
pcinfo->rx_len = rpt_len; pcinfo->rx_len = rpt_len;
pcinfo->rx_cnt++; pcinfo->rx_cnt++;
break; break;
...@@ -999,7 +1000,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev, ...@@ -999,7 +1000,7 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
pcinfo = &pfwinfo->rpt_fbtc_btdev.cinfo; pcinfo = &pfwinfo->rpt_fbtc_btdev.cinfo;
pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_btdev.finfo); pfinfo = (u8 *)(&pfwinfo->rpt_fbtc_btdev.finfo);
pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btdev.finfo); pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btdev.finfo);
pcinfo->req_fver = FCX_BTDEVINFO_VER; pcinfo->req_fver = chip->fcxbtdevinfo_ver;
pcinfo->rx_len = rpt_len; pcinfo->rx_len = rpt_len;
pcinfo->rx_cnt++; pcinfo->rx_cnt++;
break; break;
......
...@@ -1361,7 +1361,7 @@ struct rtw89_btc_cx { ...@@ -1361,7 +1361,7 @@ struct rtw89_btc_cx {
}; };
struct rtw89_btc_fbtc_tdma { struct rtw89_btc_fbtc_tdma {
u8 type; u8 type; /* chip_info::fcxtdma_ver */
u8 rxflctrl; u8 rxflctrl;
u8 txpause; u8 txpause;
u8 wtgle_n; u8 wtgle_n;
...@@ -1373,7 +1373,6 @@ struct rtw89_btc_fbtc_tdma { ...@@ -1373,7 +1373,6 @@ struct rtw89_btc_fbtc_tdma {
#define CXMREG_MAX 30 #define CXMREG_MAX 30
#define FCXMAX_STEP 255 /*STEP trace record cnt, Max:65535, default:255*/ #define FCXMAX_STEP 255 /*STEP trace record cnt, Max:65535, default:255*/
#define BTCRPT_VER 1
#define BTC_CYCLE_SLOT_MAX 48 /* must be even number, non-zero */ #define BTC_CYCLE_SLOT_MAX 48 /* must be even number, non-zero */
enum rtw89_btc_bt_rfk_counter { enum rtw89_btc_bt_rfk_counter {
...@@ -1386,7 +1385,7 @@ enum rtw89_btc_bt_rfk_counter { ...@@ -1386,7 +1385,7 @@ enum rtw89_btc_bt_rfk_counter {
}; };
struct rtw89_btc_fbtc_rpt_ctrl { struct rtw89_btc_fbtc_rpt_ctrl {
u16 fver; u16 fver; /* chip_info::fcxbtcrpt_ver */
u16 rpt_cnt; /* tmr counters */ u16 rpt_cnt; /* tmr counters */
u32 wl_fw_coex_ver; /* match which driver's coex version */ u32 wl_fw_coex_ver; /* match which driver's coex version */
u32 wl_fw_cx_offload; u32 wl_fw_cx_offload;
...@@ -1472,10 +1471,9 @@ enum { /* STEP TYPE */ ...@@ -1472,10 +1471,9 @@ enum { /* STEP TYPE */
CXSTEP_MAX, CXSTEP_MAX,
}; };
#define FCXGPIODBG_VER 1
#define BTC_DBG_MAX1 32 #define BTC_DBG_MAX1 32
struct rtw89_btc_fbtc_gpio_dbg { struct rtw89_btc_fbtc_gpio_dbg {
u8 fver; u8 fver; /* chip_info::fcxgpiodbg_ver */
u8 rsvd; u8 rsvd;
u16 rsvd2; u16 rsvd2;
u32 en_map; /* which debug signal (see btc_wl_gpio_debug) is enable */ u32 en_map; /* which debug signal (see btc_wl_gpio_debug) is enable */
...@@ -1483,9 +1481,8 @@ struct rtw89_btc_fbtc_gpio_dbg { ...@@ -1483,9 +1481,8 @@ struct rtw89_btc_fbtc_gpio_dbg {
u8 gpio_map[BTC_DBG_MAX1]; /*the debug signals to GPIO-Position */ u8 gpio_map[BTC_DBG_MAX1]; /*the debug signals to GPIO-Position */
} __packed; } __packed;
#define FCXMREG_VER 1
struct rtw89_btc_fbtc_mreg_val { struct rtw89_btc_fbtc_mreg_val {
u8 fver; u8 fver; /* chip_info::fcxmreg_ver */
u8 reg_num; u8 reg_num;
__le16 rsvd; __le16 rsvd;
__le32 mreg_val[CXMREG_MAX]; __le32 mreg_val[CXMREG_MAX];
...@@ -1507,16 +1504,14 @@ struct rtw89_btc_fbtc_slot { ...@@ -1507,16 +1504,14 @@ struct rtw89_btc_fbtc_slot {
__le16 cxtype; __le16 cxtype;
} __packed; } __packed;
#define FCXSLOTS_VER 1
struct rtw89_btc_fbtc_slots { struct rtw89_btc_fbtc_slots {
u8 fver; u8 fver; /* chip_info::fcxslots_ver */
u8 tbl_num; u8 tbl_num;
__le16 rsvd; __le16 rsvd;
__le32 update_map; __le32 update_map;
struct rtw89_btc_fbtc_slot slot[CXST_MAX]; struct rtw89_btc_fbtc_slot slot[CXST_MAX];
} __packed; } __packed;
#define FCXSTEP_VER 2
struct rtw89_btc_fbtc_step { struct rtw89_btc_fbtc_step {
u8 type; u8 type;
u8 val; u8 val;
...@@ -1524,7 +1519,7 @@ struct rtw89_btc_fbtc_step { ...@@ -1524,7 +1519,7 @@ struct rtw89_btc_fbtc_step {
} __packed; } __packed;
struct rtw89_btc_fbtc_steps { struct rtw89_btc_fbtc_steps {
u8 fver; u8 fver; /* chip_info::fcxstep_ver */
u8 rsvd; u8 rsvd;
__le16 cnt; __le16 cnt;
__le16 pos_old; __le16 pos_old;
...@@ -1532,9 +1527,8 @@ struct rtw89_btc_fbtc_steps { ...@@ -1532,9 +1527,8 @@ struct rtw89_btc_fbtc_steps {
struct rtw89_btc_fbtc_step step[FCXMAX_STEP]; struct rtw89_btc_fbtc_step step[FCXMAX_STEP];
} __packed; } __packed;
#define FCXCYSTA_VER 2
struct rtw89_btc_fbtc_cysta { /* statistics for cycles */ struct rtw89_btc_fbtc_cysta { /* statistics for cycles */
u8 fver; u8 fver; /* chip_info::fcxcysta_ver */
u8 rsvd; u8 rsvd;
__le16 cycles; /* total cycle number */ __le16 cycles; /* total cycle number */
__le16 cycles_a2dp[CXT_FLCTRL_MAX]; __le16 cycles_a2dp[CXT_FLCTRL_MAX];
...@@ -1559,9 +1553,8 @@ struct rtw89_btc_fbtc_cysta { /* statistics for cycles */ ...@@ -1559,9 +1553,8 @@ struct rtw89_btc_fbtc_cysta { /* statistics for cycles */
__le16 tslot_cycle[BTC_CYCLE_SLOT_MAX]; __le16 tslot_cycle[BTC_CYCLE_SLOT_MAX];
} __packed; } __packed;
#define FCXNULLSTA_VER 1
struct rtw89_btc_fbtc_cynullsta { /* cycle null statistics */ struct rtw89_btc_fbtc_cynullsta { /* cycle null statistics */
u8 fver; u8 fver; /* chip_info::fcxnullsta_ver */
u8 rsvd; u8 rsvd;
__le16 rsvd2; __le16 rsvd2;
__le32 max_t[2]; /* max_t for 0:null0/1:null1 */ __le32 max_t[2]; /* max_t for 0:null0/1:null1 */
...@@ -1569,9 +1562,8 @@ struct rtw89_btc_fbtc_cynullsta { /* cycle null statistics */ ...@@ -1569,9 +1562,8 @@ struct rtw89_btc_fbtc_cynullsta { /* cycle null statistics */
__le32 result[2][4]; /* 0:fail, 1:ok, 2:on_time, 3:retry */ __le32 result[2][4]; /* 0:fail, 1:ok, 2:on_time, 3:retry */
} __packed; } __packed;
#define FCX_BTVER_VER 1
struct rtw89_btc_fbtc_btver { struct rtw89_btc_fbtc_btver {
u8 fver; u8 fver; /* chip_info::fcxbtver_ver */
u8 rsvd; u8 rsvd;
__le16 rsvd2; __le16 rsvd2;
__le32 coex_ver; /*bit[15:8]->shared, bit[7:0]->non-shared */ __le32 coex_ver; /*bit[15:8]->shared, bit[7:0]->non-shared */
...@@ -1579,17 +1571,15 @@ struct rtw89_btc_fbtc_btver { ...@@ -1579,17 +1571,15 @@ struct rtw89_btc_fbtc_btver {
__le32 feature; __le32 feature;
} __packed; } __packed;
#define FCX_BTSCAN_VER 1
struct rtw89_btc_fbtc_btscan { struct rtw89_btc_fbtc_btscan {
u8 fver; u8 fver; /* chip_info::fcxbtscan_ver */
u8 rsvd; u8 rsvd;
__le16 rsvd2; __le16 rsvd2;
u8 scan[6]; u8 scan[6];
} __packed; } __packed;
#define FCX_BTAFH_VER 1
struct rtw89_btc_fbtc_btafh { struct rtw89_btc_fbtc_btafh {
u8 fver; u8 fver; /* chip_info::fcxbtafh_ver */
u8 rsvd; u8 rsvd;
__le16 rsvd2; __le16 rsvd2;
u8 afh_l[4]; /*bit0:2402, bit1: 2403.... bit31:2433 */ u8 afh_l[4]; /*bit0:2402, bit1: 2403.... bit31:2433 */
...@@ -1597,9 +1587,8 @@ struct rtw89_btc_fbtc_btafh { ...@@ -1597,9 +1587,8 @@ struct rtw89_btc_fbtc_btafh {
u8 afh_h[4]; /*bit0:2466, bit1:2467......bit14:2480 */ u8 afh_h[4]; /*bit0:2466, bit1:2467......bit14:2480 */
} __packed; } __packed;
#define FCX_BTDEVINFO_VER 1
struct rtw89_btc_fbtc_btdevinfo { struct rtw89_btc_fbtc_btdevinfo {
u8 fver; u8 fver; /* chip_info::fcxbtdevinfo_ver */
u8 rsvd; u8 rsvd;
__le16 vendor_id; __le16 vendor_id;
__le32 dev_name; /* only 24 bits valid */ __le32 dev_name; /* only 24 bits valid */
...@@ -1665,8 +1654,6 @@ struct rtw89_btc_dbg { ...@@ -1665,8 +1654,6 @@ struct rtw89_btc_dbg {
u32 rb_val; u32 rb_val;
}; };
#define FCXTDMA_VER 1
enum rtw89_btc_btf_fw_event { enum rtw89_btc_btf_fw_event {
BTF_EVNT_RPT = 0, BTF_EVNT_RPT = 0,
BTF_EVNT_BT_INFO = 1, BTF_EVNT_BT_INFO = 1,
...@@ -2462,6 +2449,19 @@ struct rtw89_chip_info { ...@@ -2462,6 +2449,19 @@ struct rtw89_chip_info {
u8 scbd; u8 scbd;
u8 mailbox; u8 mailbox;
u8 fcxbtcrpt_ver;
u8 fcxtdma_ver;
u8 fcxslots_ver;
u8 fcxcysta_ver;
u8 fcxstep_ver;
u8 fcxnullsta_ver;
u8 fcxmreg_ver;
u8 fcxgpiodbg_ver;
u8 fcxbtver_ver;
u8 fcxbtscan_ver;
u8 fcxbtafh_ver;
u8 fcxbtdevinfo_ver;
u8 afh_guard_ch; u8 afh_guard_ch;
const u8 *wl_rssi_thres; const u8 *wl_rssi_thres;
const u8 *bt_rssi_thres; const u8 *bt_rssi_thres;
......
...@@ -2158,6 +2158,20 @@ const struct rtw89_chip_info rtw8852a_chip_info = { ...@@ -2158,6 +2158,20 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
.btcx_desired = 0x5, .btcx_desired = 0x5,
.scbd = 0x1, .scbd = 0x1,
.mailbox = 0x1, .mailbox = 0x1,
.fcxbtcrpt_ver = 1,
.fcxtdma_ver = 1,
.fcxslots_ver = 1,
.fcxcysta_ver = 2,
.fcxstep_ver = 2,
.fcxnullsta_ver = 1,
.fcxmreg_ver = 1,
.fcxgpiodbg_ver = 1,
.fcxbtver_ver = 1,
.fcxbtscan_ver = 1,
.fcxbtafh_ver = 1,
.fcxbtdevinfo_ver = 1,
.afh_guard_ch = 6, .afh_guard_ch = 6,
.wl_rssi_thres = rtw89_btc_8852a_wl_rssi_thres, .wl_rssi_thres = rtw89_btc_8852a_wl_rssi_thres,
.bt_rssi_thres = rtw89_btc_8852a_bt_rssi_thres, .bt_rssi_thres = rtw89_btc_8852a_bt_rssi_thres,
......
...@@ -3006,6 +3006,20 @@ const struct rtw89_chip_info rtw8852c_chip_info = { ...@@ -3006,6 +3006,20 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
.btcx_desired = 0x5, .btcx_desired = 0x5,
.scbd = 0x1, .scbd = 0x1,
.mailbox = 0x1, .mailbox = 0x1,
.fcxbtcrpt_ver = 4,
.fcxtdma_ver = 3,
.fcxslots_ver = 1,
.fcxcysta_ver = 3,
.fcxstep_ver = 3,
.fcxnullsta_ver = 2,
.fcxmreg_ver = 1,
.fcxgpiodbg_ver = 1,
.fcxbtver_ver = 1,
.fcxbtscan_ver = 1,
.fcxbtafh_ver = 1,
.fcxbtdevinfo_ver = 1,
.afh_guard_ch = 6, .afh_guard_ch = 6,
.wl_rssi_thres = rtw89_btc_8852c_wl_rssi_thres, .wl_rssi_thres = rtw89_btc_8852c_wl_rssi_thres,
.bt_rssi_thres = rtw89_btc_8852c_bt_rssi_thres, .bt_rssi_thres = rtw89_btc_8852c_bt_rssi_thres,
......
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