ARM: dts: sun7i: Split the RTS and CTS pins out of the UART nodes

Some UART nodes on the A20 DTSI do not share the same pattern that we use
everywhere else, with the RTS and CTS pins split away from the TX and RX
pins. Make those pin groups consistent with the rest of our DT.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>

arch/arm/boot/dts/sun7i-a20-hummingbird.dts

@@ -215,13 +215,13 @@ &uart0 {
 
 &uart2 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart2_pi_pins>;
+	pinctrl-0 = <&uart2_pi_pins>, <&uart2_cts_rts_pi_pins>;
 	status = "okay";
 };
 
 &uart3 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart3_pg_pins>;
+	pinctrl-0 = <&uart3_pg_pins>, <&uart3_cts_rts_pg_pins>;
 	status = "okay";
 };
 

arch/arm/boot/dts/sun7i-a20-mk808c.dts

@@ -173,7 +173,7 @@ &uart0 {
 
 &uart2 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart2_pi_pins>;
+	pinctrl-0 = <&uart2_pi_pins>, <&uart2_cts_rts_pi_pins>;
 	status = "okay";
 };
 

arch/arm/boot/dts/sun7i-a20.dtsi

@@ -935,12 +935,22 @@ uart0_pb_pins: uart0-pb-pins {
 			};
 
 			uart2_pi_pins: uart2-pi-pins {
-				pins = "PI16", "PI17", "PI18", "PI19";
+				pins = "PI18", "PI19";
+				function = "uart2";
+			};
+
+			uart2_cts_rts_pi_pins: uart2-cts-rts-pi-pins {
+				pins = "PI16", "PI17";
 				function = "uart2";
 			};
 
 			uart3_pg_pins: uart3-pg-pins {
-				pins = "PG6", "PG7", "PG8", "PG9";
+				pins = "PG6", "PG7";
+				function = "uart3";
+			};
+
+			uart3_cts_rts_pg_pins: uart3-cts-rts-pg-pins {
+				pins = "PG8", "PG9";
 				function = "uart3";
 			};