Commit bb678298 authored by Thierry Reding's avatar Thierry Reding

arm64: tegra: Various fixes for PMICs

Standardize on "pmic" as the node name for the PMIC on Tegra210 systems
and use consistent names for pinmux and GPIO hog nodes.
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent df93557b
...@@ -1328,7 +1328,7 @@ i2c@7000d000 { ...@@ -1328,7 +1328,7 @@ i2c@7000d000 {
status = "okay"; status = "okay";
clock-frequency = <400000>; clock-frequency = <400000>;
max77620: max77620@3c { pmic: pmic@3c {
compatible = "maxim,max77620"; compatible = "maxim,max77620";
reg = <0x3c>; reg = <0x3c>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
...@@ -1343,12 +1343,12 @@ max77620: max77620@3c { ...@@ -1343,12 +1343,12 @@ max77620: max77620@3c {
pinctrl-0 = <&max77620_default>; pinctrl-0 = <&max77620_default>;
max77620_default: pinmux@0 { max77620_default: pinmux@0 {
pin_gpio0 { gpio0 {
pins = "gpio0"; pins = "gpio0";
function = "gpio"; function = "gpio";
}; };
pin_gpio1 { gpio1 {
pins = "gpio1"; pins = "gpio1";
function = "fps-out"; function = "fps-out";
drive-push-pull = <1>; drive-push-pull = <1>;
...@@ -1357,34 +1357,33 @@ pin_gpio1 { ...@@ -1357,34 +1357,33 @@ pin_gpio1 {
maxim,active-fps-power-down-slot = <0>; maxim,active-fps-power-down-slot = <0>;
}; };
pin_gpio2_3 { gpio2 {
pins = "gpio2", "gpio3"; pins = "gpio2";
function = "fps-out"; function = "fps-out";
drive-open-drain = <1>; drive-open-drain = <1>;
maxim,active-fps-source = <MAX77620_FPS_SRC_0>; maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
}; };
pin_gpio4 { gpio3 {
pins = "gpio3";
function = "fps-out";
drive-open-drain = <1>;
maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
};
gpio4 {
pins = "gpio4"; pins = "gpio4";
function = "32k-out1"; function = "32k-out1";
}; };
pin_gpio5_6_7 { gpio5_6_7 {
pins = "gpio5", "gpio6", "gpio7"; pins = "gpio5", "gpio6", "gpio7";
function = "gpio"; function = "gpio";
drive-push-pull = <1>; drive-push-pull = <1>;
}; };
pin_gpio2 {
maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
};
pin_gpio3 {
maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
};
}; };
spmic-default-output-high { gpio@0 {
gpio-hog; gpio-hog;
output-high; output-high;
gpios = <2 GPIO_ACTIVE_HIGH>, gpios = <2 GPIO_ACTIVE_HIGH>,
...@@ -1652,7 +1651,7 @@ vdd_3v3: regulator@1 { ...@@ -1652,7 +1651,7 @@ vdd_3v3: regulator@1 {
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
regulator-always-on; regulator-always-on;
gpio = <&max77620 3 GPIO_ACTIVE_HIGH>; gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
enable-active-high; enable-active-high;
}; };
...@@ -1666,7 +1665,7 @@ max77620_gpio7: regulator@2 { ...@@ -1666,7 +1665,7 @@ max77620_gpio7: regulator@2 {
regulator-always-on; regulator-always-on;
regulator-boot-on; regulator-boot-on;
gpio = <&max77620 7 GPIO_ACTIVE_HIGH>; gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
enable-active-high; enable-active-high;
}; };
...@@ -1711,7 +1710,7 @@ vdd_sys_boost: regulator@6 { ...@@ -1711,7 +1710,7 @@ vdd_sys_boost: regulator@6 {
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
regulator-always-on; regulator-always-on;
gpio = <&max77620 1 GPIO_ACTIVE_HIGH>; gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high; enable-active-high;
}; };
......
...@@ -1354,11 +1354,11 @@ max77621_cpu: max77621@1b { ...@@ -1354,11 +1354,11 @@ max77621_cpu: max77621@1b {
maxim,enable-active-discharge; maxim,enable-active-discharge;
maxim,enable-bias-control; maxim,enable-bias-control;
maxim,enable-etr; maxim,enable-etr;
maxim,enable-gpio = <&max77620 5 0>; maxim,enable-gpio = <&pmic 5 0>;
maxim,externally-enable; maxim,externally-enable;
}; };
max77620: max77620@3c { pmic: pmic@3c {
compatible = "maxim,max77620"; compatible = "maxim,max77620";
reg = <0x3c>; reg = <0x3c>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
...@@ -1372,8 +1372,8 @@ max77620: max77620@3c { ...@@ -1372,8 +1372,8 @@ max77620: max77620@3c {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&max77620_default>; pinctrl-0 = <&max77620_default>;
max77620_default: pinmux@0 { max77620_default: pinmux {
pin_gpio { gpio0_1_2_7 {
pins = "gpio0", "gpio1", "gpio2", "gpio7"; pins = "gpio0", "gpio1", "gpio2", "gpio7";
function = "gpio"; function = "gpio";
}; };
...@@ -1383,7 +1383,7 @@ pin_gpio { ...@@ -1383,7 +1383,7 @@ pin_gpio {
* sequence, So it must be sequenced up (automatically * sequence, So it must be sequenced up (automatically
* set by OTP) and down properly. * set by OTP) and down properly.
*/ */
pin_gpio3 { gpio3 {
pins = "gpio3"; pins = "gpio3";
function = "fps-out"; function = "fps-out";
drive-open-drain = <1>; drive-open-drain = <1>;
...@@ -1392,13 +1392,13 @@ pin_gpio3 { ...@@ -1392,13 +1392,13 @@ pin_gpio3 {
maxim,active-fps-power-down-slot = <2>; maxim,active-fps-power-down-slot = <2>;
}; };
pin_gpio5_6 { gpio5_6 {
pins = "gpio5", "gpio6"; pins = "gpio5", "gpio6";
function = "gpio"; function = "gpio";
drive-push-pull = <1>; drive-push-pull = <1>;
}; };
pin_32k { gpio4 {
pins = "gpio4"; pins = "gpio4";
function = "32k-out1"; function = "32k-out1";
}; };
......
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