Commit bb9f4d26 authored by Alexander Usyskin's avatar Alexander Usyskin Committed by Greg Kroah-Hartman

mei: me: d0i3: add flag to indicate D0i3 support

Detect d0i3 low power state during hw configuration,
the value is set in HFS_1 pci config reigister.
Signed-off-by: default avatarAlexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: default avatarTomas Winkler <tomas.winkler@intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 11830486
...@@ -123,6 +123,7 @@ ...@@ -123,6 +123,7 @@
/* Host Firmware Status Registers in PCI Config Space */ /* Host Firmware Status Registers in PCI Config Space */
#define PCI_CFG_HFS_1 0x40 #define PCI_CFG_HFS_1 0x40
# define PCI_CFG_HFS_1_D0I3_MSK 0x80000000
#define PCI_CFG_HFS_2 0x48 #define PCI_CFG_HFS_2 0x48
#define PCI_CFG_HFS_3 0x60 #define PCI_CFG_HFS_3 0x60
#define PCI_CFG_HFS_4 0x64 #define PCI_CFG_HFS_4 0x64
......
...@@ -176,12 +176,20 @@ static int mei_me_fw_status(struct mei_device *dev, ...@@ -176,12 +176,20 @@ static int mei_me_fw_status(struct mei_device *dev,
*/ */
static void mei_me_hw_config(struct mei_device *dev) static void mei_me_hw_config(struct mei_device *dev)
{ {
struct pci_dev *pdev = to_pci_dev(dev->dev);
struct mei_me_hw *hw = to_me_hw(dev); struct mei_me_hw *hw = to_me_hw(dev);
u32 hcsr = mei_hcsr_read(dev); u32 hcsr, reg;
/* Doesn't change in runtime */ /* Doesn't change in runtime */
hcsr = mei_hcsr_read(dev);
dev->hbuf_depth = (hcsr & H_CBD) >> 24; dev->hbuf_depth = (hcsr & H_CBD) >> 24;
hw->pg_state = MEI_PG_OFF; hw->pg_state = MEI_PG_OFF;
reg = 0;
pci_read_config_dword(pdev, PCI_CFG_HFS_1, &reg);
hw->d0i3_supported =
((reg & PCI_CFG_HFS_1_D0I3_MSK) == PCI_CFG_HFS_1_D0I3_MSK);
} }
/** /**
......
...@@ -50,13 +50,15 @@ struct mei_cfg { ...@@ -50,13 +50,15 @@ struct mei_cfg {
* struct mei_me_hw - me hw specific data * struct mei_me_hw - me hw specific data
* *
* @cfg: per device generation config and ops * @cfg: per device generation config and ops
* @mem_addr: io memory address * @mem_addr: io memory address
* @pg_state: power gating state * @pg_state: power gating state
* @d0i3_supported: di03 support
*/ */
struct mei_me_hw { struct mei_me_hw {
const struct mei_cfg *cfg; const struct mei_cfg *cfg;
void __iomem *mem_addr; void __iomem *mem_addr;
enum mei_pg_state pg_state; enum mei_pg_state pg_state;
bool d0i3_supported;
}; };
#define to_me_hw(dev) (struct mei_me_hw *)((dev)->hw) #define to_me_hw(dev) (struct mei_me_hw *)((dev)->hw)
......
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