Commit bd10838a authored by Or Gerlitz's avatar Or Gerlitz Committed by Saeed Mahameed

net/mlx5: Fix some spelling mistakes

Fixed few places where endianness was misspelled and
one spot whwere output was:

CHECK: 'endianess' may be misspelled - perhaps 'endianness'?
CHECK: 'ouput' may be misspelled - perhaps 'output'?
Signed-off-by: default avatarOr Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
parent 14160ea2
...@@ -439,7 +439,7 @@ static void get_atomic_caps(struct mlx5_ib_dev *dev, ...@@ -439,7 +439,7 @@ static void get_atomic_caps(struct mlx5_ib_dev *dev,
u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations); u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations);
u8 atomic_size_qp = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp); u8 atomic_size_qp = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp);
u8 atomic_req_8B_endianness_mode = u8 atomic_req_8B_endianness_mode =
MLX5_CAP_ATOMIC(dev->mdev, atomic_req_8B_endianess_mode); MLX5_CAP_ATOMIC(dev->mdev, atomic_req_8B_endianness_mode);
/* Check if HW supports 8 bytes standard atomic operations and capable /* Check if HW supports 8 bytes standard atomic operations and capable
* of host endianness respond * of host endianness respond
......
...@@ -874,7 +874,7 @@ static const char *deliv_status_to_str(u8 status) ...@@ -874,7 +874,7 @@ static const char *deliv_status_to_str(u8 status)
case MLX5_CMD_DELIVERY_STAT_IN_LENGTH_ERR: case MLX5_CMD_DELIVERY_STAT_IN_LENGTH_ERR:
return "command input length error"; return "command input length error";
case MLX5_CMD_DELIVERY_STAT_OUT_LENGTH_ERR: case MLX5_CMD_DELIVERY_STAT_OUT_LENGTH_ERR:
return "command ouput length error"; return "command output length error";
case MLX5_CMD_DELIVERY_STAT_RES_FLD_NOT_CLR_ERR: case MLX5_CMD_DELIVERY_STAT_RES_FLD_NOT_CLR_ERR:
return "reserved fields not cleared"; return "reserved fields not cleared";
case MLX5_CMD_DELIVERY_STAT_CMD_DESCR_ERR: case MLX5_CMD_DELIVERY_STAT_CMD_DESCR_ERR:
......
...@@ -356,7 +356,7 @@ static void mlx5_disable_msix(struct mlx5_core_dev *dev) ...@@ -356,7 +356,7 @@ static void mlx5_disable_msix(struct mlx5_core_dev *dev)
kfree(priv->msix_arr); kfree(priv->msix_arr);
} }
struct mlx5_reg_host_endianess { struct mlx5_reg_host_endianness {
u8 he; u8 he;
u8 rsvd[15]; u8 rsvd[15];
}; };
...@@ -475,7 +475,7 @@ static int handle_hca_cap_atomic(struct mlx5_core_dev *dev) ...@@ -475,7 +475,7 @@ static int handle_hca_cap_atomic(struct mlx5_core_dev *dev)
req_endianness = req_endianness =
MLX5_CAP_ATOMIC(dev, MLX5_CAP_ATOMIC(dev,
supported_atomic_req_8B_endianess_mode_1); supported_atomic_req_8B_endianness_mode_1);
if (req_endianness != MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS) if (req_endianness != MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS)
return 0; return 0;
...@@ -487,7 +487,7 @@ static int handle_hca_cap_atomic(struct mlx5_core_dev *dev) ...@@ -487,7 +487,7 @@ static int handle_hca_cap_atomic(struct mlx5_core_dev *dev)
set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability); set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability);
/* Set requestor to host endianness */ /* Set requestor to host endianness */
MLX5_SET(atomic_caps, set_hca_cap, atomic_req_8B_endianess_mode, MLX5_SET(atomic_caps, set_hca_cap, atomic_req_8B_endianness_mode,
MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS); MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS);
err = set_caps(dev, set_ctx, set_sz, MLX5_SET_HCA_CAP_OP_MOD_ATOMIC); err = set_caps(dev, set_ctx, set_sz, MLX5_SET_HCA_CAP_OP_MOD_ATOMIC);
...@@ -562,8 +562,8 @@ static int handle_hca_cap(struct mlx5_core_dev *dev) ...@@ -562,8 +562,8 @@ static int handle_hca_cap(struct mlx5_core_dev *dev)
static int set_hca_ctrl(struct mlx5_core_dev *dev) static int set_hca_ctrl(struct mlx5_core_dev *dev)
{ {
struct mlx5_reg_host_endianess he_in; struct mlx5_reg_host_endianness he_in;
struct mlx5_reg_host_endianess he_out; struct mlx5_reg_host_endianness he_out;
int err; int err;
if (!mlx5_core_is_pf(dev)) if (!mlx5_core_is_pf(dev))
......
...@@ -661,9 +661,9 @@ enum { ...@@ -661,9 +661,9 @@ enum {
struct mlx5_ifc_atomic_caps_bits { struct mlx5_ifc_atomic_caps_bits {
u8 reserved_at_0[0x40]; u8 reserved_at_0[0x40];
u8 atomic_req_8B_endianess_mode[0x2]; u8 atomic_req_8B_endianness_mode[0x2];
u8 reserved_at_42[0x4]; u8 reserved_at_42[0x4];
u8 supported_atomic_req_8B_endianess_mode_1[0x1]; u8 supported_atomic_req_8B_endianness_mode_1[0x1];
u8 reserved_at_47[0x19]; u8 reserved_at_47[0x19];
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment