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Commit bd979a33 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'samsung-dt64-5.9' of... 

Merge tag 'samsung-dt64-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v5.9

1. Enable UFS (Universal Flash Storage) on Exynos7 Espresso board.
2. Fix silent hang after boot off Exynos7 Espresso board.
3. Minor DTS fixes and adjustments with dtschema.

* tag 'samsung-dt64-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: Add unit address to soc node and move thermal zones on Exynos7
  arm64: dts: exynos: Add unit address to soc node on Exynos5433
  arm64: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings
  arm64: dts: exynos: Keep LDO12 always-on on Espresso
  arm64: dts: exynos: Fix silent hang after boot on Espresso
  arm64: dts: exynos: Remove generic arm,armv8-pmuv3 compatible
  arm64: dts: exynos: Describe PWM interrupts on Exynos7
  arm64: dts: exynos: Add UFS node to Exynos7

Link: https://lore.kernel.org/r/20200721180900.13844-3-krzk@kernel.orgSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 3236013b 229134cc
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arch/arm64/boot/dts/exynos/exynos5433.dtsi
View file @ bd979a33
......@@ -24,7 +24,7 @@ / {
interrupt-parent = <&gic>;
arm_a53_pmu {
compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3";
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
......@@ -33,7 +33,7 @@ arm_a53_pmu {
};
arm_a57_pmu {
compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";
compatible = "arm,cortex-a57-pmu";
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
......@@ -256,7 +256,7 @@ psci {
cpu_on = <0xC4000003>;
};
soc: soc {
soc: soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -1756,33 +1756,26 @@ mshc_2: mshc@15560000 {
status = "disabled";
};
amba {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
pdma0: pdma@15610000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x15610000 0x1000>;
interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_fsys CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: pdma@15600000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x15600000 0x1000>;
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_fsys CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma0: pdma@15610000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x15610000 0x1000>;
interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_fsys CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: pdma@15600000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x15600000 0x1000>;
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_fsys CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
audio-subsystem@11400000 {
......
arch/arm64/boot/dts/exynos/exynos7-espresso.dts
View file @ bd979a33
......@@ -157,6 +157,7 @@ ldo7_reg: LDO7 {
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1150000>;
regulator-enable-ramp-delay = <125>;
regulator-always-on;
};
ldo8_reg: LDO8 {
......@@ -193,6 +194,7 @@ ldo12_reg: LDO12 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1300000>;
regulator-enable-ramp-delay = <125>;
regulator-always-on;
};
ldo13_reg: LDO13 {
......@@ -406,6 +408,10 @@ usb3drd_boost_en: usb3drd-boost-en {
};
};
&ufs {
status = "okay";
};
&usbdrd_phy {
vbus-supply = <&usb30_vbus_reg>;
vbus-boost-supply = <&usb3drd_boost_5v>;
......
arch/arm64/boot/dts/exynos/exynos7.dtsi
View file @ bd979a33
......@@ -29,7 +29,7 @@ aliases {
};
arm-pmu {
compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";
compatible = "arm,cortex-a57-pmu";
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
......@@ -83,7 +83,7 @@ psci {
method = "smc";
};
soc: soc {
soc: soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -105,33 +105,26 @@ gic: interrupt-controller@11001000 {
<0x11006000 0x2000>;
};
amba {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
pdma0: pdma@10e10000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x10E10000 0x1000>;
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_fsys0 ACLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma0: pdma@10e10000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x10E10000 0x1000>;
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_fsys0 ACLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: pdma@10eb0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x10EB0000 0x1000>;
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_fsys0 ACLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: pdma@10eb0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x10EB0000 0x1000>;
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_fsys0 ACLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
clock_topc: clock-controller@10570000 {
......@@ -220,9 +213,14 @@ clock_fsys1: clock-controller@156e0000 {
#clock-cells = <1>;
clocks = <&fin_pll>, <&clock_top1 DOUT_ACLK_FSYS1_200>,
<&clock_top1 DOUT_SCLK_MMC0>,
<&clock_top1 DOUT_SCLK_MMC1>;
<&clock_top1 DOUT_SCLK_MMC1>,
<&clock_top1 DOUT_SCLK_UFSUNIPRO20>,
<&clock_top1 DOUT_SCLK_PHY_FSYS1>,
<&clock_top1 DOUT_SCLK_PHY_FSYS1_26M>;
clock-names = "fin_pll", "dout_aclk_fsys1_200",
"dout_sclk_mmc0", "dout_sclk_mmc1";
"dout_sclk_mmc0", "dout_sclk_mmc1",
"dout_sclk_ufsunipro20", "dout_sclk_phy_fsys1",
"dout_sclk_phy_fsys1_26m";
};
serial_0: serial@13630000 {
......@@ -576,6 +574,11 @@ adc: adc@13620000 {
pwm: pwm@136c0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x136c0000 0x100>;
interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>;
samsung,pwm-outputs = <0>, <1>, <2>, <3>;
#pwm-cells = <3>;
clocks = <&clock_peric0 PCLK_PWM>;
......@@ -592,13 +595,38 @@ tmuctrl_0: tmu@10060000 {
#thermal-sensor-cells = <0>;
};
thermal-zones {
atlas_thermal: cluster0-thermal {
polling-delay-passive = <0>; /* milliseconds */
polling-delay = <0>; /* milliseconds */
thermal-sensors = <&tmuctrl_0>;
#include "exynos7-trip-points.dtsi"
};
ufs: ufs@15570000 {
compatible = "samsung,exynos7-ufs";
reg = <0x15570000 0x100>, /* 0: HCI standard */
<0x15570100 0x100>, /* 1: Vendor specificed */
<0x15571000 0x200>, /* 2: UNIPRO */
<0x15572000 0x300>; /* 3: UFS protector */
reg-names = "hci", "vs_hci", "unipro", "ufsp";
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_fsys1 ACLK_UFS20_LINK>,
<&clock_fsys1 SCLK_UFSUNIPRO20_USER>;
clock-names = "core_clk", "sclk_unipro_main";
freq-table-hz = <0 0>, <0 0>;
pinctrl-names = "default";
pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
phys = <&ufs_phy>;
phy-names = "ufs-phy";
status = "disabled";
};
ufs_phy: ufs-phy@15571800 {
compatible = "samsung,exynos7-ufs-phy";
reg = <0x15571800 0x240>;
reg-names = "phy-pma";
samsung,pmu-syscon = <&pmu_system_controller>;
#phy-cells = <0>;
clocks = <&clock_fsys1 SCLK_COMBO_PHY_EMBEDDED_26M>,
<&clock_fsys1 PHYCLK_UFS20_RX1_SYMBOL_USER>,
<&clock_fsys1 PHYCLK_UFS20_RX0_SYMBOL_USER>,
<&clock_fsys1 PHYCLK_UFS20_TX0_SYMBOL_USER>;
clock-names = "ref_clk", "rx1_symbol_clk",
"rx0_symbol_clk",
"tx0_symbol_clk";
};
usbdrd_phy: phy@15500000 {
......@@ -636,6 +664,15 @@ dwc3@15400000 {
};
};
thermal-zones {
atlas_thermal: cluster0-thermal {
polling-delay-passive = <0>; /* milliseconds */
polling-delay = <0>; /* milliseconds */
thermal-sensors = <&tmuctrl_0>;
#include "exynos7-trip-points.dtsi"
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
......
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