Commit bdac2b6d authored by Thomas Gleixner's avatar Thomas Gleixner

gpio/davinci: Fix race in installing chained irq handler

Fix a race where a pending interrupt could be received and the handler
called before the handler's data has been setup, by converting to
irq_set_chained_handler_and_data().
    
Search and conversion was done with coccinelle.
Reported-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
parent 1765d671
...@@ -579,15 +579,13 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) ...@@ -579,15 +579,13 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
writel_relaxed(~0, &g->clr_falling); writel_relaxed(~0, &g->clr_falling);
writel_relaxed(~0, &g->clr_rising); writel_relaxed(~0, &g->clr_rising);
/* set up all irqs in this bank */
irq_set_chained_handler(bank_irq, gpio_irq_handler);
/* /*
* Each chip handles 32 gpios, and each irq bank consists of 16 * Each chip handles 32 gpios, and each irq bank consists of 16
* gpio irqs. Pass the irq bank's corresponding controller to * gpio irqs. Pass the irq bank's corresponding controller to
* the chained irq handler. * the chained irq handler.
*/ */
irq_set_handler_data(bank_irq, &chips[gpio / 32]); irq_set_chained_handler_and_data(bank_irq, gpio_irq_handler,
&chips[gpio / 32]);
binten |= BIT(bank); binten |= BIT(bank);
} }
......
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