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Commit bdd9c8e5 authored by Linus Torvalds's avatar Linus Torvalds
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Import 2.4.0-test2pre2

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Documentation/arm/README
View file @ bdd9c8e5
ARM Linux 2.2.3
===============
ARM Linux 2.4.0test1
====================
* NOTE * The ARM support in the mainstream Linux kernel sources
is not up to date. Please check ftp.arm.uk.linux.org:/pub/armlinux
for latest updates.
Please check ftp.arm.linux.org.uk:/pub/armlinux for latest updates.
Compilation of kernel
---------------------
......@@ -13,10 +11,10 @@ Compilation of kernel
and EGCS are good compilers. Note that GCC-2.7.2.2 ELF is rare, and
you probably don't have it.
To build ARM Linux natively, you shouldn't have to alter the ARCH = line in
the top level Makefile. However, if you don't have the ARM Linux ELF tools
installed as default, then you should change the CROSS_COMPILE line as
detailed below.
To build ARM Linux natively, you shouldn't have to alter the ARCH = line
in the top level Makefile. However, if you don't have the ARM Linux ELF
tools installed as default, then you should change the CROSS_COMPILE
line as detailed below.
If you wish to cross-compile, then alter the following lines in the top
level make file:
......@@ -41,27 +39,28 @@ Compilation of kernel
Bug reports etc
---------------
Please send patches, bug reports and code for the ARM Linux project
to linux@arm.linux.org.uk Patches will not be included into future
kernels unless they come to me (or the relevant person concerned).
Please send patches to the patch system. For more information, see
http://www.arm.linux.org.uk/patches/info.html Always include some
explanation as to what the patch does and why it is needed.
Bug reports should be sent to linux-arm-kernel@lists.arm.linux.org.uk,
or submitted through the web form at
http://www.arm.linux.org.uk/forms/solution.shtml
When sending bug reports, please ensure that they contain all relevant
information, eg. the kernel messages that were printed before/during
the problem, what you were doing, etc.
For patches, please include some explanation as to what the patch does
and why (if relevant).
Modules
-------
Although modularisation is supported (and required for the FP emulator),
each module on an arm2/arm250/arm3 machine when is loaded will take
memory up to the next 32k boundary due to the size of the pages. Hence is
modularisation on these machines really worth it?
each module on an ARM2/ARM250/ARM3 machine when is loaded will take
memory up to the next 32k boundary due to the size of the pages.
Therefore, modularisation on these machines really worth it?
However, arm6 and up machines allow modules to take multiples of 4k, and
However, ARM6 and up machines allow modules to take multiples of 4k, and
as such Acorn RiscPCs and other architectures using these processors can
make good use of modularisation.
......@@ -124,7 +123,7 @@ Kernel entry (head-armv.S)
The initial entry into the kernel made via head-armv.S uses architecture
independent code. The architecture is selected by the value of 'r1' on
entry, which must be kept unique. You can register a new architecture
by mailing the following details to rmk@arm.uk.linux.org. Please give
by mailing the following details to rmk@arm.linux.org.uk Please give
the mail a subject of 'Register new architecture':
Name: <name of your architecture>
......@@ -133,7 +132,7 @@ Kernel entry (head-armv.S)
<description of your architecture>
Please follow this format - it is an automated system. You should
receive a reply the next day.
receive a reply within one day.
---
Russell King (27/03/1999)
Russell King (12/06/2000)
Documentation/arm/SA1100/LART
View file @ bdd9c8e5
......@@ -10,6 +10,5 @@ daughterboards. A quad Ethernet / IDE / PS2 / sound daughterboard
is under development, with plenty of others in different stages of
planning.
The designs for this board have been released under a GPL-like license;
For lot more info, see the LART page at http://www.lart.tudelft.nl.
The hardware designs for this board have been released under an open license;
see the LART page at http://www.lart.tudelft.nl/ for more information.
Documentation/networking/8139too.txt
View file @ bdd9c8e5
......@@ -181,11 +181,25 @@ User-mode (or maybe optional /proc) diagnostics program.
11) RTL8139C support untested.
12) 10base-T support flaky or slow
Change History
--------------
Version 0.9.7 - June 11, 2000
* Fix support for older chips (RTL8139 early chips should now work again)
Version 0.9.6 - May 30, 2000
* Fix 4-extra-bytes bug
(thanks to Markus Westergren, via Santiago Garcia Mantinan)
* Yet more improved chip recognition
Version 0.9.5 - May 17, 2000
* Improved chip version recognition
......
Documentation/networking/shaper.txt
View file @ bdd9c8e5
Traffic Shaper For Linux
This is the current ALPHA release of the traffic shaper for Linux. It works
This is the current BETA release of the traffic shaper for Linux. It works
within the following limits:
o Minimum shaping speed is currently about 9600 baud (it can only
......@@ -37,13 +37,12 @@ and will treat it as such unless patched. Note that for mrouted you can run
mrouted tunnels via a traffic shaper to control bandwidth usage.
The shaper is device/route based. This makes it very easy to use
with any setup BUT less flexible. You may well want to combine this patch
with Mike McLagan <mmclagan@linux.org>'s patch to allow routes to be
specified by source/destination pairs.
with any setup BUT less flexible. You may need to use iproute2 to set up
multiple route tables to get the flexibility.
There is no "borrowing" or "sharing" scheme. This is a simple
traffic limiter. I'd like to implement Van Jacobson and Sally Floyd's CBQ
architecture into Linux one day (maybe in 2.1 sometime) and do this with
style.
traffic limiter. We implement Van Jacobson and Sally Floyd's CBQ
architecture into Linux 2.2. THis is the preferred solution. Shaper is
for simple or back compatible setups.
Alan
Documentation/networking/sk98lin.txt
View file @ bdd9c8e5
......@@ -3,7 +3,7 @@
sk98lin.txt created 11-Nov-1999
Readme File for sk98lin.o v3.02
Readme File for sk98lin.o v3.04
SK-NET Gigabit Ethernet Adapter SK-98xx Driver for Linux
This file contains
......@@ -24,8 +24,8 @@ This file contains
============
The sk98lin driver supports the SysKonnect SK-NET Gigabit Ethernet
Adapter SK-98xx family on Linux 2.2.x.
It has been tested with Linux on Intel/x86 and ALPHA machines.
Adapter SK-98xx family on Linux 2.2.x and above.
It has been tested with Linux on Intel/x86, ALPHA and UltraSPARC machines.
From v3.02 on, the driver is integrated in the linux kernel source.
***
......@@ -132,7 +132,8 @@ Parameters can be set at the command line while loading the
module with 'insmod'. The configuration tools of some distributions
can also give parameters to the driver module.
If you use the kernel module loader, you can set driver parameters
in the file /etc/conf.modules. Insert a line of the form:
in the file /etc/modules.conf (or old name: /etc/conf.modules).
Insert a line of the form:
options sk98lin ...
......@@ -281,14 +282,12 @@ The setting must be done on all adapters that can be reached by
the large frames. If one adapter is not set to receive large frames,
it will simply drop them.
NOTE: If you look at the statistics (with netstat) in large frame
mode while there is traffic on the net, you will see the
RX error counter go up. This is because the adapter hardware
counts received large frames as errors, although they are
received correctly. So ignore this counter in that case.
You can switch back to the standard ethernet frame size with:
ifconfig eth0 mtu 1500
To make this setting persitent, add a script with the 'ifconfig'
line to the system startup sequence (named something like "S99sk98lin"
in /etc/rc.d/rc2.d).
***
......@@ -374,15 +373,27 @@ following information is available:
(8) HISTORY
===========
VERSION 3.02
VERSION 3.04 (In-Kernel version)
Problems fixed:
- Driver start failed on UltraSPARC
- Rx checksum calculation for big endian machines did not work
- Jumbo frames were counted as input-errors in netstat
VERSION 3.03 (Standalone version)
Problems fixed:
- Compilation did not find script "printver.sh" if "." not in PATH
Known limitations:
- None
VERSION 3.02 (In-Kernel version)
Problems fixed:
- None
New Features:
- Integration in linux kernel source.
- Integration in Linux kernel source (2.2.14 and 2.3.29)
Known limitations:
- None
VERSION 3.02
VERSION 3.01
Problems fixed:
- None
New Features:
......
Documentation/networking/tulip.txt
View file @ bdd9c8e5
......@@ -142,6 +142,24 @@ tulip_core.c - Driver core (a.k.a. where "everything else" goes)
Version history
===============
0.9.6 (May 31, 2000):
* Revert 21143-related support flag patch
* Add HPPA/media-table debugging printk
0.9.5 (May 30, 2000):
* HPPA support (willy@puffingroup)
* CSR6 bits and tulip.h cleanup (Chris Smith)
* Improve debugging messages a bit
* Add delay after CSR13 write in t21142_start_nway
* Remove unused ETHER_STATS code
* Convert 'extern inline' to 'static inline' in tulip.h (Chris Smith)
* Update DS21143 support flags in tulip_chip_info[]
* Use spin_lock_irq, not _irqsave/restore, in tulip_start_xmit()
* Add locking to set_rx_mode()
* Fix race with chip setting DescOwned bit (Hal Murray)
* Request 100% of PIO and MMIO resource space assigned to card
* Remove error message from pci_enable_device failure
0.9.4.3 (April 14, 2000):
* mod_timer fix (Hal Murray)
* PNIC2 resusitation (Chris Smith)
......
Documentation/networking/vortex.txt
View file @ bdd9c8e5
......@@ -156,7 +156,12 @@ compaq_device_id=N
"Variables to work-around the Compaq PCI BIOS32 problem"....
watchdog=N
Sets the time duration (in milliseconds) after which the kernel
decides that the transmitter has become stuck and needs to be reset.
This is mainly for debugging purposes. The default value is 400 (0.4
seconds).
Additional resources
--------------------
......
Documentation/parport.txt
View file @ bdd9c8e5
......@@ -109,7 +109,10 @@ parport
| | |-- active
| | `-- lp
| | `-- timeslice
| |-- hardware
| |-- base-addr
| |-- irq
| |-- dma
| |-- modes
| `-- spintime
`-- parport1
|-- autoprobe
......@@ -121,7 +124,10 @@ parport
| |-- active
| `-- ppa
| `-- timeslice
|-- hardware
|-- base-addr
|-- irq
|-- dma
|-- modes
`-- spintime
......@@ -133,7 +139,28 @@ devices/active A list of the device drivers using that port. A "+"
string "none" means that there are no device drivers
using that port.
hardware Parallel port's base address, IRQ line and DMA channel.
base-addr Parallel port's base address, or addresses if the port
has more than one in which case they are separated
with tabs. These values might not have any sensible
meaning for some ports.
irq Parallel port's IRQ, or -1 if none is being used.
dma Parallel port's DMA channel, or -1 if none is being
used.
modes Parallel port's hardware modes, comma-separated,
meaning:
PCSPP PC-style SPP registers are available.
TRISTATE Port is bidirectional.
COMPAT Hardware acceleration for printers is
available and will be used.
EPP Hardware acceleration for EPP protocol
is available and will be used.
ECP Hardware acceleration for ECP protocol
is available and will be used.
DMA DMA is available and will be used.
autoprobe Any IEEE-1284 device ID information that has been
acquired from the (non-IEEE 1284.3) device.
......
Documentation/powerpc/SBC8260_memory_mapping.txt 0 → 100644
View file @ bdd9c8e5
Please mail me (Jon Diekema, diekema_jon@si.com or diekema@cideas.com)
if you have questions, comments or corrections.
* EST SBC8260 Linux memory mapping rules
http://www.estc.com/
http://www.estc.com/products/boards/SBC8260-8240_ds.html
Initial conditions:
-------------------
Tasks that need to be perform by the boot ROM before control is
transferred to zImage (compressed Linux kernel):
- Define the IMMR to 0xf0000000
- Initialize the memory controller so that RAM is available at
physical address 0x00000000. On the SBC8260 is this 16M (64M)
SDRAM.
- The boot ROM should only clear the RAM that it is using.
The reason for doing this is to enhances the chances of a
successful post mortem on a Linux panic. One of the first
items to examine is the 16k (LOG_BUF_LEN) circular console
buffer called log_buf which is defined in kernel/printk.c.
- To enhance boot ROM performance, the I-cache can be enabled.
Date: Mon, 22 May 2000 14:21:10 -0700
From: Neil Russell <caret@c-side.com>
LiMon (LInux MONitor) runs with and starts Linux with MMU
off, I-cache enabled, D-cache disabled. The I-cache doesn't
need hints from the MMU to work correctly as the D-cache
does. No D-cache means no special code to handle devices in
the presence of cache (no snooping, etc). The use of the
I-cache means that the monitor can run acceptably fast
directly from ROM, rather than having to copy it to RAM.
- Build the board information structure (see
include/asm-ppc/est8260.h for its definition)
- The compressed Linux kernel (zImage) contains a bootstrap loader
that is position independent; you can load it into any RAM,
ROM or FLASH memory address >= 0x00500000 (above 5 MB), or
at its link address of 0x00400000 (4 MB).
Note: If zImage is loaded at its link address of 0x00400000 (4 MB),
then zImage will skip the step of moving itself to
its link address.
- Load R3 with the address of the board information structure
- Transfer control to zImage
- The Linux console port is SMC1, and the baud rate is controlled
from the bi_baudrate field of the board information structure.
On thing to keep in mind when picking the baud rate, is that
there is no flow control on the SMC ports. I would stick
with something safe and standard like 19200.
On the EST SBC8260, the SMC1 port is on the COM1 connector of
the board.
EST SBC8260 defaults:
---------------------
Chip
Memory Sel Bus Use
--------------------- --- --- ----------------------------------
0x00000000-0x03FFFFFF CS2 60x (16M or 64M)/64M SDRAM
0x04000000-0x04FFFFFF CS4 local 4M/16M SDRAM (soldered to the board)
0x21000000-0x21000000 CS7 60x 1B/64K Flash present detect (from the flash SIMM)
0x21000001-0x21000001 CS7 60x 1B/64K Switches (read) and LEDs (write)
0x22000000-0x2200FFFF CS5 60x 8K/64K EEPROM
0xFC000000-0xFCFFFFFF CS6 60x 2M/16M flash (8 bits wide, soldered to the board)
0xFE000000-0xFFFFFFFF CS0 60x 4M/16M flash (SIMM)
Notes:
------
- The chip selects can map 32K blocks and up (powers of 2)
- The SDRAM machine can handled up to 128Mbytes per chip select
- Linux uses the 60x bus memory (the SDRAM DIMM) for the
communications buffers.
- BATs can map 128K-256Mbytes each. There are four data BATs and
four instruction BATs. Generally the data and instruction BATs
are mapped the same.
- The IMMR must be set above the kernel virtual memory addresses,
which start at 0xC0000000. Otherwise, the kernel may crash as
soon as you start any threads or processes due to VM collisions
in the kernel or user process space.
Details from Dan Malek <dan_malek@mvista.com> on 10/29/1999:
The user application virtual space consumes the first 2 Gbytes
(0x00000000 to 0x7FFFFFFF). The kernel virtual text starts at
0xC0000000, with data following. There is a "protection hole"
between the end of kernel data and the start of the kernel
dynamically allocated space, but this space is still within
0xCxxxxxxx.
Obviously the kernel can't map any physical addresses 1:1 in
these ranges.
Details from Dan Malek <dan_malek@mvista.com> on 5/19/2000:
During the early kernel initialization, the kernel virtual
memory allocator is not operational. Prior to this KVM
initialization, we choose to map virtual to physical addresses
1:1. That is, the kernel virtual address exactly matches the
physical address on the bus. These mappings are typically done
in arch/ppc/kernel/head.S, or arch/ppc/mm/init.c. Only
absolutely necessary mappings should be done at this time, for
example board control registers or a serial uart. Normal device
driver initialization should map resources later when necessary.
Although platform dependent, and certainly the case for embedded
8xx, traditionally memory is mapped at physical address zero,
and I/O devices above phsical address 0x80000000. The lowest
and highest (above 0xf0000000) I/O addresses are traditionally
used for devices or registers we need to map during kernel
initialization and prior to KVM operation. For this reason,
and since it followed prior PowerPC platform examples, I chose
to map the embedded 8xx kernel to the 0xc0000000 virtual address.
This way, we can enable the MMU to map the kernel for proper
operation, and still map a few windows before the KVM is operational.
On some systems, you could possibly run the kernel at the
0x80000000 or any other virtual address. It just depends upon
mapping that must be done prior to KVM operational. You can never
map devices or kernel spaces that overlap with the user virtual
space. This is why default IMMR mapping used by most BDM tools
won't work. They put the IMMR at something like 0x10000000 or
0x02000000 for example. You simply can't map these addresses early
in the kernel, and continue proper system operation.
The embedded 8xx/82xx kernel is mature enough that all you should
need to do is map the IMMR someplace at or above 0xf0000000 and it
should boot far enough to get serial console messages and KGDB
connected on any platform. There are lots of other subtle memory
management design features that you simply don't need to worry
about. If you are changing functions related to MMU initialization,
you are likely breaking things that are known to work and are
heading down a path of disaster and frustration. Your changes
should be to make the flexibility of the processor fit Linux,
not force arbitrary and non-workable memory mappings into Linux.
- You don't want to change KERNELLOAD or KERNELBASE, otherwise the
virtual memory and MMU code will get confused.
arch/ppc/Makefile:KERNELLOAD = 0xc0000000
include/asm-ppc/page.h:#define PAGE_OFFSET 0xc0000000
include/asm-ppc/page.h:#define KERNELBASE PAGE_OFFSET
- RAM is at physical address 0x00000000, and gets mapped to
virtual address 0xC0000000 for the kernel.
Physical addresses used by the Linux kernel:
--------------------------------------------
0x00000000-0x3FFFFFFF 1GB reserved for RAM
0xF0000000-0xF001FFFF 128K IMMR 64K used for dual port memory,
64K for 8260 registers
Logical addresses used by the Linux kernel:
-------------------------------------------
0xF0000000-0xFFFFFFFF 256M BAT0 (IMMR: dual port RAM, registers)
0xE0000000-0xEFFFFFFF 256M BAT1 (I/O space for custom boards)
0xC0000000-0xCFFFFFFF 256M BAT2 (RAM)
0xD0000000-0xDFFFFFFF 256M BAT3 (if RAM > 256MByte)
EST SBC8260 Linux mapping:
--------------------------
DBAT0, IBAT0, cache inhibited:
Chip
Memory Sel Use
--------------------- --- ---------------------------------
0xF0000000-0xF001FFFF n/a IMMR: dual port RAM, registers
DBAT1, IBAT1, cache inhibited:
Documentation/usb/input.txt
View file @ bdd9c8e5
Linux Input drivers v0.9
(c) 1999 Vojtech Pavlik <vojtech@suse.cz>
Linux Input drivers v1.0
(c) 1999-2000 Vojtech Pavlik <vojtech@suse.cz>
Sponsored by SuSE
$Id: input.txt,v 1.4 2000/05/28 17:57:22 vojtech Exp $
----------------------------------------------------------------------------
0. Disclaimer
......@@ -62,27 +63,27 @@ kernel):
hid.o
After this, the USB keyboard will work straight away, and the USB mouse
will be available as a character device on major 13, minor 32:
will be available as a character device on major 13, minor 63:
crw-r--r-- 1 root root 13, 32 Mar 28 22:45 mouse0
crw-r--r-- 1 root root 13, 63 Mar 28 22:45 mice
This device, has to be created, unless you use devfs, in which case it's
created automatically. The commands to do that are:
cd /dev
mkdir input
mknod input/mouse0 c 13 32
mknod input/mice c 13 63
After that you have to point GPM (the textmode mouse cut&paste tool) and
XFree to this device to use it - GPM should be called like:
gpm -t ps2 -m /dev/input/mouse0
gpm -t ps2 -m /dev/input/mice
And in X:
Section "Pointer"
Protocol "ImPS/2"
Device "/dev/input/mouse0"
Device "/dev/input/mice"
ZAxisMapping 4 5
EndSection
......@@ -199,10 +200,11 @@ no mice are present.
CONFIG_INPUT_MOUSEDEV_SCREEN_[XY] in the kernel configuration are the size
of your screen (in pixels) in XFree86. This is needed if you want to use
your digitizer in X, because it's movement is sent to X via a virtual PS/2
mouse. These values won't be used if you use a mouse only.
mouse and thus needs to be scaled accordingly. These values won't be used if
you use a mouse only.
Mousedev.c will generate either PS/2, ImPS/2 (microsoft intellimouse) or
GenPS/2 (genius netmouse/netscroll) protocols, depending on what the program
Mousedev will generate either PS/2, ImPS/2 (Microsoft IntelliMouse) or
GenPS/2 (Genius NetMouse/NetScroll) protocols, depending on what the program
reading the data wishes. You can set GPM and X to any of these. You'll need
ImPS/2 if you want to make use of a wheel on a USB mouse and GenPS/2 if you
want to use extra (up to 5) buttons. I'm not sure how much is GenPS/2 supported
......@@ -249,8 +251,12 @@ independent.
http://www.suse.cz/development/input/
You'll find both the latest HID driver and the complete Input driver there.
There is also a mailing list for this:
You'll find both the latest HID driver and the complete Input driver there
as well as information how to access the CVS repository for latest revisions
of the drivers.
There is also a mailing list for this:
majordomo@atrey.karlin.mff.cuni.cz
......@@ -278,8 +284,8 @@ can. Here goes a description of the current state of things, which is going
to be extended, but not changed incompatibly as time goes:
You can use blocking and nonblocking reads, also select() on the
/dev/inputX devices, and you'll always get a whole number of input events on
a read. Their layout is:
/dev/input/eventX devices, and you'll always get a whole number of input
events on a read. Their layout is:
struct input_event {
struct timeval time;
......
Documentation/usb/ov511.txt
View file @ bdd9c8e5
......@@ -6,21 +6,16 @@ Author: Mark McClelland
Homepage: http://alpha.dyndns.org/ov511
NEW IN THIS VERSION:
o 384x288 and 448x336 modes
o better /proc/video support
o Race conditions and other bugs fixed
INTRODUCTION:
This is a preliminary version of my OV511 Linux device driver. Currently, it can
grab a frame in color (YUV420) at 640x480 or 320x240 using either vidcat or
xawtv. Other utilities may work but have not yet been tested.
Any camera using the OV511/OV511+ and the OV7610/20/20AE CCD should work. The
driver only detects known cameras though, based on their custom id number. If
you have a currently unsupported camera, the ID number should be reported to you
in the kernel logs. Please send me the model, manufacturer and ID number and I
will add it to the detection code. In the meantime, you can add to the code
yourself in the function ov511_probe().
This is a driver for the OV511, a USB-only chip used in many "webcam" devices.
Any camera using the OV511/OV511+ and the OV7610/20/20AE CCD should work.It
supports streaming and capture of color or monochrome video via the Video4Linux
API. Most V4L apps are compatible with it, but a few videoconferencing programs
do not work yet. The following resolutions are supported: 640x480, 448x336,
384x288, 352x288, and 320x240.
WHAT YOU NEED:
......@@ -93,7 +88,8 @@ A: The I2C code that allows the OV511 to communicate with the camera chip is a
bit flaky right now. This message means that the I2C bus never got
initialized properly, and the camera will most likely not work even if you
disable this warning. Try unloading/reloading the driver or unplugging/re-
plugging the camera if this happens.
plugging the camera if this happens. Also try increasing the i2c_detect_tries
parameter (see below).
Q: "Why do you bother with this phony camera detection crap? It doesn't do
anything useful!"
......@@ -200,9 +196,6 @@ TODO:
would like them to release their specifications to the Linux community.
o Get 160x120 working
o YUV422 (and other color modes)
o Fix read(). It only works right now if you run an mmap() based app like xawtv
or vidcat after loading the module and before using read(). Apparently there
are some initialization issues.
o Get snapshot mode working with mmap().
o Fix fixFrameRGBoffset(). It is not stable yet with streaming video.
o Get hue (red/blue channel balance) adjustment working (in ov511_get_picture()
......
Makefile
View file @ bdd9c8e5
VERSION = 2
PATCHLEVEL = 4
SUBLEVEL = 0
EXTRAVERSION = -test1
EXTRAVERSION = -test2
KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
......
arch/alpha/boot/bootp.c
View file @ bdd9c8e5
......@@ -93,7 +93,7 @@ pal_init(void)
i = switch_to_osf_pal(2, pcb_va, pcb_pa, VPTB);
if (i) {
srm_printk("failed, code %ld\n", i);
halt();
__halt();
}
percpu = (struct percpu_struct *)
......@@ -171,8 +171,7 @@ start_kernel(void)
srm_printk("Initrd positioned at %#lx\n", initrd_start);
#endif
nbytes = srm_dispatch(CCB_GET_ENV, ENV_BOOTED_OSFLAGS,
envval, sizeof(envval));
nbytes = callback_getenv(ENV_BOOTED_OSFLAGS, envval, sizeof(envval));
if (nbytes < 0 || nbytes >= sizeof(envval)) {
nbytes = 0;
}
......@@ -181,18 +180,17 @@ start_kernel(void)
/* NOTE: *no* callbacks or printouts from here on out!!! */
/*
* This is a hack, as some consoles seem to get virtual 20000000
* (ie where the SRM console puts the kernel bootp image) memory
* overlapping physical 310000 memory, which causes real problems
* when attempting to copy the former to the latter... :-(
/* This is a hack, as some consoles seem to get virtual 20000000 (ie
* where the SRM console puts the kernel bootp image) memory
* overlapping physical memory where the kernel wants to be put,
* which causes real problems when attempting to copy the former to
* the latter... :-(
*
* So, we first move the kernel virtual-to-physical way above where
* we physically want the kernel to end up, then copy it from there
* to its final resting place... ;-}
*
* Sigh...
*/
* Sigh... */
#ifdef INITRD_SIZE
load(initrd_start, KERNEL_ORIGIN+KERNEL_SIZE, INITRD_SIZE);
......
arch/alpha/boot/main.c
View file @ bdd9c8e5
......@@ -90,7 +90,7 @@ pal_init(void)
i = switch_to_osf_pal(2, pcb_va, pcb_pa, VPTB);
if (i) {
srm_printk("failed, code %ld\n", i);
halt();
__halt();
}
percpu = (struct percpu_struct *)
......@@ -107,15 +107,15 @@ static inline long openboot(void)
char bootdev[256];
long result;
result = srm_dispatch(CCB_GET_ENV, ENV_BOOTED_DEV, bootdev, 255);
result = callback_getenv(ENV_BOOTED_DEV, bootdev, 255);
if (result < 0)
return result;
return srm_dispatch(CCB_OPEN, bootdev, result & 255);
return callback_open(bootdev, result & 255);
}
static inline long close(long dev)
{
return srm_dispatch(CCB_CLOSE, dev);
return callback_close(dev);
}
static inline long load(long dev, unsigned long addr, unsigned long count)
......@@ -124,7 +124,7 @@ static inline long load(long dev, unsigned long addr, unsigned long count)
extern char _end;
long result, boot_size = &_end - (char *) BOOT_ADDR;
result = srm_dispatch(CCB_GET_ENV, ENV_BOOTED_FILE, bootfile, 255);
result = callback_getenv(ENV_BOOTED_FILE, bootfile, 255);
if (result < 0)
return result;
result &= 255;
......@@ -132,7 +132,7 @@ static inline long load(long dev, unsigned long addr, unsigned long count)
if (result)
srm_printk("Boot file specification (%s) not implemented\n",
bootfile);
return srm_dispatch(CCB_READ, dev, count, addr, boot_size/512 + 1);
return callback_read(dev, count, addr, boot_size/512 + 1);
}
/*
......@@ -176,8 +176,7 @@ void start_kernel(void)
return;
}
nbytes = srm_dispatch(CCB_GET_ENV, ENV_BOOTED_OSFLAGS,
envval, sizeof(envval));
nbytes = callback_getenv(ENV_BOOTED_OSFLAGS, envval, sizeof(envval));
if (nbytes < 0) {
nbytes = 0;
}
......@@ -188,5 +187,5 @@ void start_kernel(void)
runkernel();
for (i = 0 ; i < 0x100000000 ; i++)
/* nothing */;
halt();
__halt();
}
arch/alpha/config.in
View file @ bdd9c8e5
#
# For a description of the syntax of this configuration file,
# see the Configure script.
# see Documentation/kbuild/config-language.txt.
#
define_bool CONFIG_UID16 n
......@@ -51,7 +51,9 @@ choice 'Alpha system type' \
RX164 CONFIG_ALPHA_RX164 \
SX164 CONFIG_ALPHA_SX164 \
Sable CONFIG_ALPHA_SABLE \
Takara CONFIG_ALPHA_TAKARA" Generic
Takara CONFIG_ALPHA_TAKARA \
Titan CONFIG_ALPHA_TITAN \
Wildfire CONFIG_ALPHA_WILDFIRE" Generic
# clear all implied options (don't want default values for those):
unset CONFIG_ALPHA_EV4 CONFIG_ALPHA_EV5 CONFIG_ALPHA_EV6
......@@ -131,6 +133,16 @@ then
define_bool CONFIG_ALPHA_EV6 y
define_bool CONFIG_ALPHA_TSUNAMI y
fi
if [ "$CONFIG_ALPHA_WILDFIRE" = "y" ]
then
define_bool CONFIG_PCI y
define_bool CONFIG_ALPHA_EV6 y
fi
if [ "$CONFIG_ALPHA_TITAN" = "y" ]
then
define_bool CONFIG_PCI y
define_bool CONFIG_ALPHA_EV6 y
fi
if [ "$CONFIG_ALPHA_RAWHIDE" = "y" ]
then
define_bool CONFIG_ALPHA_EV5 y
......@@ -151,18 +163,23 @@ then
define_bool CONFIG_ALPHA_IRONGATE y
fi
if [ "$CONFIG_ALPHA_JENSEN" = "y" -o "$CONFIG_ALPHA_MIKASA" = "y" \
-o "$CONFIG_ALPHA_SABLE" = "y" -o "$CONFIG_ALPHA_NORITAKE" = "y" \
-o "$CONFIG_ALPHA_DP264" = "y" -o "$CONFIG_ALPHA_RAWHIDE" = "y" \
-o "$CONFIG_ALPHA_EIGER" = "y" -o "$CONFIG_ALPHA_WILDFIRE" = "y" \
-o "$CONFIG_ALPHA_TITAN" = "y" ]
then
define_bool CONFIG_ALPHA_SRM y
fi
if [ "$CONFIG_ALPHA_CABRIOLET" = "y" -o "$CONFIG_ALPHA_AVANTI" = "y" \
-o "$CONFIG_ALPHA_EB64P" = "y" -o "$CONFIG_ALPHA_JENSEN" = "y" \
-o "$CONFIG_ALPHA_EB64P" = "y" -o "$CONFIG_ALPHA_PC164" = "y" \
-o "$CONFIG_ALPHA_TAKARA" = "y" -o "$CONFIG_ALPHA_EB164" = "y" \
-o "$CONFIG_ALPHA_MIKASA" = "y" -o "$CONFIG_ALPHA_ALCOR" = "y" \
-o "$CONFIG_ALPHA_SABLE" = "y" -o "$CONFIG_ALPHA_MIATA" = "y" \
-o "$CONFIG_ALPHA_NORITAKE" = "y" -o "$CONFIG_ALPHA_PC164" = "y" \
-o "$CONFIG_ALPHA_LX164" = "y" -o "$CONFIG_ALPHA_SX164" = "y" \
-o "$CONFIG_ALPHA_DP264" = "y" -o "$CONFIG_ALPHA_RAWHIDE" = "y" \
-o "$CONFIG_ALPHA_EIGER" = "y" ]
-o "$CONFIG_ALPHA_ALCOR" = "y" -o "$CONFIG_ALPHA_MIATA" = "y" \
-o "$CONFIG_ALPHA_LX164" = "y" -o "$CONFIG_ALPHA_SX164" = "y" ]
then
bool 'Use SRM as bootloader' CONFIG_ALPHA_SRM
fi
if [ "$CONFIG_ALPHA_ALCOR" = "y" -o "$CONFIG_ALPHA_MIKASA" = "y" \
-o "$CONFIG_ALPHA_SABLE" = "y" -o "$CONFIG_ALPHA_NORITAKE" = "y" \
-o "$CONFIG_ALPHA_RAWHIDE" = "y" ]
......@@ -179,7 +196,8 @@ then
fi
if [ "$CONFIG_ALPHA_SABLE" = "y" -o "$CONFIG_ALPHA_RAWHIDE" = "y" \
-o "$CONFIG_ALPHA_DP264" = "y" -o "$CONFIG_ALPHA_GENERIC" = "y" ]
-o "$CONFIG_ALPHA_DP264" = "y" -o "$CONFIG_ALPHA_WILDFIRE" = "y" \
-o "$CONFIG_ALPHA_TITAN" = "y" -o "$CONFIG_ALPHA_GENERIC" = "y" ]
then
bool 'Symmetric multi-processing support' CONFIG_SMP
fi
......@@ -286,6 +304,12 @@ if [ "$CONFIG_VT" = "y" ]; then
mainmenu_option next_comment
comment 'Console drivers'
bool 'VGA text console' CONFIG_VGA_CONSOLE
# if [ "$CONFIG_PCI" = "y" -a "$CONFIG_VGA_CONSOLE" = "y" ]; then
# bool ' Allow VGA on any bus?' CONFIG_VGA_HOSE
# if [ "$CONFIG_VGA_HOSE" = "y" ]; then
# define_bool CONFIG_DUMMY_CONSOLE y
# fi
# fi
source drivers/video/Config.in
if [ "$CONFIG_FB" = "y" ]; then
define_bool CONFIG_PCI_CONSOLE y
......
arch/alpha/defconfig
View file @ bdd9c8e5
......@@ -45,6 +45,8 @@ CONFIG_ALPHA_GENERIC=y
# CONFIG_ALPHA_SX164 is not set
# CONFIG_ALPHA_SABLE is not set
# CONFIG_ALPHA_TAKARA is not set
# CONFIG_ALPHA_TITAN is not set
# CONFIG_ALPHA_WILDFIRE is not set
CONFIG_ISA=y
# CONFIG_SBUS is not set
CONFIG_PCI=y
......@@ -83,10 +85,6 @@ CONFIG_BLK_DEV_FD=y
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
#
# Additional Block Devices
#
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_MD is not set
......
arch/alpha/kernel/Makefile
View file @ bdd9c8e5
......@@ -26,17 +26,22 @@ O_OBJS += smp.o irq_smp.o
endif
ifdef CONFIG_PCI
L_OBJS += pci.o pci_iommu.o
O_OBJS += pci.o pci_iommu.o
endif
ifdef CONFIG_VGA_HOSE
L_OBJS += console.o
endif
ifdef CONFIG_ALPHA_GENERIC
O_OBJS += core_apecs.o core_cia.o core_irongate.o core_lca.o core_mcpcia.o \
core_polaris.o core_t2.o core_tsunami.o \
core_polaris.o core_t2.o core_tsunami.o core_titan.o \
sys_alcor.o sys_cabriolet.o sys_dp264.o sys_eb64p.o sys_eiger.o \
sys_jensen.o sys_miata.o sys_mikasa.o sys_nautilus.o \
sys_jensen.o sys_miata.o sys_mikasa.o sys_nautilus.o sys_titan.o \
sys_noritake.o sys_rawhide.o sys_ruffian.o sys_rx164.o \
sys_sable.o sys_sio.o sys_sx164.o sys_takara.o sys_rx164.o
sys_sable.o sys_sio.o sys_sx164.o sys_takara.o sys_rx164.o \
sys_wildfire.o core_wildfire.o
else
......@@ -62,9 +67,15 @@ endif
ifdef CONFIG_ALPHA_TSUNAMI
O_OBJS += core_tsunami.o
endif
ifdef CONFIG_ALPHA_TITAN
O_OBJS += core_titan.o
endif
ifdef CONFIG_ALPHA_POLARIS
O_OBJS += core_polaris.o
endif
ifdef CONFIG_ALPHA_WILDFIRE
O_OBJS += core_wildfire.o
endif
# Board support
ifneq ($(CONFIG_ALPHA_ALCOR)$(CONFIG_ALPHA_XLT),)
......@@ -76,6 +87,9 @@ endif
ifdef CONFIG_ALPHA_DP264
O_OBJS += sys_dp264.o
endif
ifdef CONFIG_ALPHA_TITAN
O_OBJS += sys_titan.o
endif
ifneq ($(CONFIG_ALPHA_EB64P)$(CONFIG_ALPHA_EB66),)
O_OBJS += sys_eb64p.o
endif
......@@ -118,6 +132,9 @@ endif
ifdef CONFIG_ALPHA_TAKARA
O_OBJS += sys_takara.o
endif
ifdef CONFIG_ALPHA_WILDFIRE
O_OBJS += sys_wildfire.o
endif
endif # GENERIC
......
arch/alpha/kernel/console.c 0 → 100644
View file @ bdd9c8e5
/*
* linux/arch/alpha/kernel/console.c
*
* Architecture-specific specific support for VGA device on
* non-0 I/O hose
*/
#include <linux/config.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/tty.h>
#include <linux/console.h>
#include <asm/vga.h>
#include <asm/machvec.h>
#ifdef CONFIG_VGA_HOSE
/*
* Externally-visible vga hose bases
*/
unsigned long __vga_hose_io_base = 0; /* base for default hose */
unsigned long __vga_hose_mem_base = 0; /* base for default hose */
static struct pci_controler * __init
default_vga_hose_select(struct pci_controler *h1, struct pci_controler *h2)
{
if (h2->index < h1->index)
return h2;
return h1;
}
void __init
set_vga_hose(struct pci_controler *hose)
{
if (hose) {
__vga_hose_io_base = hose->io_space->start;
__vga_hose_mem_base = hose->mem_space->start;
}
}
void __init
locate_and_init_vga(void *(*sel_func)(void *, void *))
{
struct pci_controler *hose = NULL;
struct pci_dev *dev = NULL;
if (!sel_func) sel_func = (void *)default_vga_hose_select;
for(dev=NULL; (dev=pci_find_class(PCI_CLASS_DISPLAY_VGA << 8, dev));) {
if (!hose) hose = dev->sysdata;
else hose = sel_func(hose, dev->sysdata);
}
/* Did we already inititialize the correct one? */
if (conswitchp == &vga_con &&
__vga_hose_io_base == hose->io_space->start &&
__vga_hose_mem_base == hose->mem_space->start)
return;
/* Set the VGA hose and init the new console */
set_vga_hose(hose);
take_over_console(&vga_con, 0, MAX_NR_CONSOLES-1, 1);
}
#endif
arch/alpha/kernel/core_mcpcia.c
View file @ bdd9c8e5
......@@ -45,6 +45,8 @@
#define MCPCIA_MAX_HOSES 4
static int mcpcia_hose_count; /* Actual number found. */
/*
* Given a bus, device, and function number, compute resulting
* configuration space address and setup the MCPCIA_HAXR2 register
......@@ -308,6 +310,7 @@ mcpcia_probe_hose(int h)
mb();
draina();
wrmces(7);
mcheck_expected(cpu) = 2; /* indicates probing */
mcheck_taken(cpu) = 0;
mcheck_extra(cpu) = mid;
......@@ -410,18 +413,19 @@ mcpcia_startup_hose(struct pci_controler *hose)
* ??? We ought to scale window 1 with memory.
*/
hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0);
hose->sg_pci = iommu_arena_new(hose, 0x40000000, 0x08000000, 0);
/* Make sure to align the arenas. */
hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 1);
hose->sg_pci = iommu_arena_new(hose, 0x40000000, 0x08000000, 1);
__direct_map_base = 0x80000000;
__direct_map_size = 0x80000000;
*(vuip)MCPCIA_W0_BASE(mid) = hose->sg_isa->dma_base | 3;
*(vuip)MCPCIA_W0_MASK(mid) = (hose->sg_isa->size - 1) & 0xfff00000;
*(vuip)MCPCIA_T0_BASE(mid) = virt_to_phys(hose->sg_isa->ptes) >> 2;
*(vuip)MCPCIA_T0_BASE(mid) = virt_to_phys(hose->sg_isa->ptes) >> 8;
*(vuip)MCPCIA_W1_BASE(mid) = hose->sg_pci->dma_base | 3;
*(vuip)MCPCIA_W1_MASK(mid) = (hose->sg_pci->size - 1) & 0xfff00000;
*(vuip)MCPCIA_T1_BASE(mid) = virt_to_phys(hose->sg_pci->ptes) >> 2;
*(vuip)MCPCIA_T1_BASE(mid) = virt_to_phys(hose->sg_pci->ptes) >> 8;
*(vuip)MCPCIA_W2_BASE(mid) = __direct_map_base | 1;
*(vuip)MCPCIA_W2_MASK(mid) = (__direct_map_size - 1) & 0xfff00000;
......@@ -464,18 +468,20 @@ void __init
mcpcia_init_hoses(void)
{
struct pci_controler *hose;
int h, hose_count = 0;
int h;
mcpcia_hose_count = 0;
/* First, find how many hoses we have. */
for (h = 0; h < MCPCIA_MAX_HOSES; ++h) {
if (mcpcia_probe_hose(h)) {
if (h != 0)
mcpcia_new_hose(h);
hose_count++;
mcpcia_hose_count++;
}
}
printk("mcpcia_init_hoses: found %d hoses\n", hose_count);
printk("mcpcia_init_hoses: found %d hoses\n", mcpcia_hose_count);
/* Now do init for each hose. */
for (hose = hose_head; hose; hose = hose->next)
......@@ -554,6 +560,65 @@ mcpcia_print_uncorrectable(struct el_MCPCIA_uncorrected_frame_mcheck *logout)
frame->ld_lock);
}
static void
mcpcia_print_system_area(unsigned long la_ptr)
{
struct el_common *frame;
int i;
struct IOD_subpacket {
unsigned long base;
unsigned int whoami;
unsigned int rsvd1;
unsigned int pci_rev;
unsigned int cap_ctrl;
unsigned int hae_mem;
unsigned int hae_io;
unsigned int int_ctl;
unsigned int int_reg;
unsigned int int_mask0;
unsigned int int_mask1;
unsigned int mc_err0;
unsigned int mc_err1;
unsigned int cap_err;
unsigned int rsvd2;
unsigned int pci_err1;
unsigned int mdpa_stat;
unsigned int mdpa_syn;
unsigned int mdpb_stat;
unsigned int mdpb_syn;
unsigned int rsvd3;
unsigned int rsvd4;
unsigned int rsvd5;
} *iodpp;
frame = (struct el_common *)la_ptr;
iodpp = (struct IOD_subpacket *) (la_ptr + frame->sys_offset);
for (i = 0; i < mcpcia_hose_count; i++, iodpp++) {
printk("IOD %d Register Subpacket - Bridge Base Address %16lx\n",
i, iodpp->base);
printk(" WHOAMI = %8x\n", iodpp->whoami);
printk(" PCI_REV = %8x\n", iodpp->pci_rev);
printk(" CAP_CTRL = %8x\n", iodpp->cap_ctrl);
printk(" HAE_MEM = %8x\n", iodpp->hae_mem);
printk(" HAE_IO = %8x\n", iodpp->hae_io);
printk(" INT_CTL = %8x\n", iodpp->int_ctl);
printk(" INT_REG = %8x\n", iodpp->int_reg);
printk(" INT_MASK0 = %8x\n", iodpp->int_mask0);
printk(" INT_MASK1 = %8x\n", iodpp->int_mask1);
printk(" MC_ERR0 = %8x\n", iodpp->mc_err0);
printk(" MC_ERR1 = %8x\n", iodpp->mc_err1);
printk(" CAP_ERR = %8x\n", iodpp->cap_err);
printk(" PCI_ERR1 = %8x\n", iodpp->pci_err1);
printk(" MDPA_STAT = %8x\n", iodpp->mdpa_stat);
printk(" MDPA_SYN = %8x\n", iodpp->mdpa_syn);
printk(" MDPB_STAT = %8x\n", iodpp->mdpb_stat);
printk(" MDPB_SYN = %8x\n", iodpp->mdpb_syn);
}
}
void
mcpcia_machine_check(unsigned long vector, unsigned long la_ptr,
struct pt_regs * regs)
......@@ -594,6 +659,8 @@ mcpcia_machine_check(unsigned long vector, unsigned long la_ptr,
mb();
process_mcheck_info(vector, la_ptr, regs, "MCPCIA", expected != 0);
if (!expected && vector != 0x620 && vector != 0x630)
if (!expected && vector != 0x620 && vector != 0x630) {
mcpcia_print_uncorrectable(mchk_logout);
mcpcia_print_system_area(la_ptr);
}
}
arch/alpha/kernel/core_titan.c 0 → 100644
View file @ bdd9c8e5
This diff is collapsed.
arch/alpha/kernel/core_tsunami.c
View file @ bdd9c8e5
......@@ -344,11 +344,13 @@ tsunami_init_one_pchip(tsunami_pchip *pchip, int index)
/*
* Set up the PCI to main memory translation windows.
*
* Note: Window 3 is scatter-gather only
*
* Window 0 is scatter-gather 8MB at 8MB (for isa)
* Window 1 is scatter-gather 128MB at 3GB
* Window 2 is direct access 1GB at 1GB
* Window 3 is direct access 1GB at 2GB
* ??? We ought to scale window 1 memory.
* Window 1 is direct access 1GB at 1GB
* Window 2 is direct access 1GB at 2GB
* Window 3 is scatter-gather 128MB at 3GB
* ??? We ought to scale window 3 memory.
*
* We must actually use 2 windows to direct-map the 2GB space,
* because of an idiot-syncrasy of the CYPRESS chip. It may
......@@ -364,17 +366,17 @@ tsunami_init_one_pchip(tsunami_pchip *pchip, int index)
pchip->wsm[0].csr = (hose->sg_isa->size - 1) & 0xfff00000;
pchip->tba[0].csr = virt_to_phys(hose->sg_isa->ptes);
pchip->wsba[1].csr = hose->sg_pci->dma_base | 3;
pchip->wsm[1].csr = (hose->sg_pci->size - 1) & 0xfff00000;
pchip->tba[1].csr = virt_to_phys(hose->sg_pci->ptes);
pchip->wsba[1].csr = 0x40000000 | 1;
pchip->wsm[1].csr = (0x40000000 - 1) & 0xfff00000;
pchip->tba[1].csr = 0;
pchip->wsba[2].csr = 0x40000000 | 1;
pchip->wsba[2].csr = 0x80000000 | 1;
pchip->wsm[2].csr = (0x40000000 - 1) & 0xfff00000;
pchip->tba[2].csr = 0;
pchip->tba[2].csr = 0x40000000;
pchip->wsba[3].csr = 0x80000000 | 1;
pchip->wsm[3].csr = (0x40000000 - 1) & 0xfff00000;
pchip->tba[3].csr = 0x40000000;
pchip->wsba[3].csr = hose->sg_pci->dma_base | 3;
pchip->wsm[3].csr = (hose->sg_pci->size - 1) & 0xfff00000;
pchip->tba[3].csr = virt_to_phys(hose->sg_pci->ptes);
tsunami_pci_tbi(hose, 0, -1);
}
......
arch/alpha/kernel/core_wildfire.c 0 → 100644
View file @ bdd9c8e5
This diff is collapsed.
arch/alpha/kernel/entry.S
View file @ bdd9c8e5
......@@ -34,11 +34,12 @@
#define TASK_EXEC_DOMAIN 32
#define TASK_NEED_RESCHED 40
#define TASK_PROCESSOR 100
#define TASK_PTRACE 104
/*
* task flags (must match include/linux/sched.h):
*/
#define PF_PTRACED 0x00000010
#define PT_PTRACED 0x00000001
#define CLONE_VM 0x00000100
......@@ -557,10 +558,10 @@ entSys:
lda $5,sys_call_table
lda $27,sys_ni_syscall
cmpult $0,$4,$4
ldq $3,TASK_FLAGS($8)
ldq $3,TASK_PTRACE($8)
stq $17,SP_OFF+32($30)
s8addq $0,$5,$5
and $3,PF_PTRACED,$3
and $3,PT_PTRACED,$3
stq $18,SP_OFF+40($30)
bne $3,strace
beq $4,1f
......
arch/alpha/kernel/irq.c
View file @ bdd9c8e5
......@@ -233,14 +233,14 @@ static unsigned long irq_affinity[NR_IRQS] = { [0 ... NR_IRQS-1] = ~0UL };
static void
select_smp_affinity(int irq)
{
static int last_cpu;
static int last_cpu = 0;
int cpu = last_cpu + 1;
if (! irq_desc[irq].handler->set_affinity || irq_user_affinity[irq])
return;
while (((cpu_present_mask >> cpu) & 1) == 0)
cpu = (cpu < NR_CPUS ? cpu + 1 : 0);
cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0);
last_cpu = cpu;
irq_affinity[irq] = 1UL << cpu;
......@@ -520,8 +520,10 @@ get_irq_list(char *buf)
p += sprintf(p, " ");
for (i = 0; i < smp_num_cpus; i++)
p += sprintf(p, "CPU%d ", i);
#ifdef DO_BROADCAST_INTS
for (i = 0; i < smp_num_cpus; i++)
p += sprintf(p, "TRY%d ", i);
#endif
*p++ = '\n';
#endif
......@@ -536,9 +538,11 @@ get_irq_list(char *buf)
for (j = 0; j < smp_num_cpus; j++)
p += sprintf(p, "%10u ",
kstat.irqs[cpu_logical_map(j)][i]);
#ifdef DO_BROADCAST_INTS
for (j = 0; j < smp_num_cpus; j++)
p += sprintf(p, "%10lu ",
irq_attempt(cpu_logical_map(j), i));
#endif
#endif
p += sprintf(p, " %14s", irq_desc[i].handler->typename);
p += sprintf(p, " %c%s",
......
arch/alpha/kernel/irq_alpha.c
View file @ bdd9c8e5
......@@ -105,8 +105,18 @@ common_init_isa_dma(void)
void __init
init_IRQ(void)
{
alpha_mv.init_irq();
/* Uh, this really MUST come first, just in case
* the platform init_irq() causes interrupts/mchecks
* (as is the case with RAWHIDE, at least).
*/
wrent(entInt, 0);
alpha_mv.init_irq();
/* If we had wanted SRM console printk echoing early, undo it now. */
if (alpha_using_srm && srmcons_output) {
unregister_srm_console();
}
}
/*
......
arch/alpha/kernel/irq_i8259.c
View file @ bdd9c8e5
......@@ -126,6 +126,8 @@ init_i8259a_irqs(void)
# define IACK_SC CIA_IACK_SC
#elif defined(CONFIG_ALPHA_PYXIS)
# define IACK_SC PYXIS_IACK_SC
#elif defined(CONFIG_ALPHA_TITAN)
# define IACK_SC TITAN_IACK_SC
#elif defined(CONFIG_ALPHA_TSUNAMI)
# define IACK_SC TSUNAMI_IACK_SC
#elif defined(CONFIG_ALPHA_POLARIS)
......
arch/alpha/kernel/machvec_impl.h
View file @ bdd9c8e5
......@@ -9,12 +9,14 @@
#include <linux/config.h>
#include <asm/pgalloc.h>
/* Whee. IRONGATE, POLARIS and TSUNAMI don't have an HAE. Fix things up for
the GENERIC kernel by defining the HAE address to be that of the cache.
Now we can read and write it as we like. ;-) */
/* Whee. IRONGATE, POLARIS, TSUNAMI, TITAN, and WILDFIRE don't have an HAE.
Fix things up for the GENERIC kernel by defining the HAE address
to be that of the cache. Now we can read and write it as we like. ;-) */
#define IRONGATE_HAE_ADDRESS (&alpha_mv.hae_cache)
#define POLARIS_HAE_ADDRESS (&alpha_mv.hae_cache)
#define TSUNAMI_HAE_ADDRESS (&alpha_mv.hae_cache)
#define TITAN_HAE_ADDRESS (&alpha_mv.hae_cache)
#define WILDFIRE_HAE_ADDRESS (&alpha_mv.hae_cache)
#if CIA_ONE_HAE_WINDOW
#define CIA_HAE_ADDRESS (&alpha_mv.hae_cache)
......@@ -28,6 +30,7 @@
seems like such a pain. Define this to get things to compile. */
#define JENSEN_IACK_SC 1
#define T2_IACK_SC 1
#define WILDFIRE_IACK_SC 1 /* FIXME */
/*
......@@ -91,6 +94,8 @@
#define DO_POLARIS_IO IO(POLARIS,polaris)
#define DO_T2_IO IO(T2,t2)
#define DO_TSUNAMI_IO IO(TSUNAMI,tsunami)
#define DO_TITAN_IO IO(TITAN,titan)
#define DO_WILDFIRE_IO IO(WILDFIRE,wildfire)
#define DO_PYXIS_IO IO_LITE(CIA,cia_bwx), \
pci_ops: &CAT(cia,_pci_ops)
......@@ -107,6 +112,8 @@
#define DO_POLARIS_BUS BUS(polaris)
#define DO_T2_BUS BUS(t2)
#define DO_TSUNAMI_BUS BUS(tsunami)
#define DO_TITAN_BUS BUS(titan)
#define DO_WILDFIRE_BUS BUS(wildfire)
/*
......
arch/alpha/kernel/osf_sys.c
View file @ bdd9c8e5
......@@ -230,7 +230,6 @@ asmlinkage unsigned long osf_mmap(unsigned long addr, unsigned long len,
struct file *file = NULL;
unsigned long ret = -EBADF;
down(&current->mm->mmap_sem);
lock_kernel();
#if 0
if (flags & (_MAP_HASSEMAPHORE | _MAP_INHERIT | _MAP_UNALIGNED))
......@@ -243,12 +242,13 @@ asmlinkage unsigned long osf_mmap(unsigned long addr, unsigned long len,
goto out;
}
flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
down(&current->mm->mmap_sem);
ret = do_mmap(file, addr, len, prot, flags, off);
up(&current->mm->mmap_sem);
if (file)
fput(file);
out:
unlock_kernel();
up(&current->mm->mmap_sem);
return ret;
}
......
arch/alpha/kernel/pci.c
View file @ bdd9c8e5
......@@ -25,11 +25,13 @@
*/
const char *const pci_io_names[] = {
"PCI IO bus 0", "PCI IO bus 1", "PCI IO bus 2", "PCI IO bus 3"
"PCI IO bus 0", "PCI IO bus 1", "PCI IO bus 2", "PCI IO bus 3",
"PCI IO bus 4", "PCI IO bus 5", "PCI IO bus 6", "PCI IO bus 7"
};
const char *const pci_mem_names[] = {
"PCI mem bus 0", "PCI mem bus 1", "PCI mem bus 2", "PCI mem bus 3"
"PCI mem bus 0", "PCI mem bus 1", "PCI mem bus 2", "PCI mem bus 3",
"PCI mem bus 4", "PCI mem bus 5", "PCI mem bus 6", "PCI mem bus 7"
};
const char pci_hae0_name[] = "HAE0";
......@@ -266,6 +268,7 @@ pcibios_fixup_bus(struct pci_bus *bus)
struct pci_controler *hose = (struct pci_controler *) bus->sysdata;
struct list_head *ln;
/* ???? */
bus->resource[0] = hose->io_space;
bus->resource[1] = hose->mem_space;
......@@ -291,15 +294,14 @@ pcibios_update_resource(struct pci_dev *dev, struct resource *root,
u32 reg;
if (resource < PCI_ROM_RESOURCE)
where = PCI_BASE_ADDRESS_0 + (resource * 4);
where = PCI_BASE_ADDRESS_0 + (resource * 4);
else if (resource == PCI_ROM_RESOURCE)
where = dev->rom_base_reg;
else {
/* Don't update non-standard resources here */
return;
return; /* Don't update non-standard resources here. */
}
/* Point root at the hose root */
/* Point root at the hose root. */
if (res->flags & IORESOURCE_IO)
root = hose->io_space;
if (res->flags & IORESOURCE_MEM)
......@@ -431,6 +433,11 @@ pcibios_size_bridge(struct pci_bus *bus, struct pbus_set_ranges_data *outer)
bridge->resource[0].end = bridge->resource[0].start + inner.io_end;
bridge->resource[1].end = bridge->resource[1].start + inner.mem_end;
bridge->resource[PCI_BRIDGE_RESOURCES].end =
bridge->resource[PCI_BRIDGE_RESOURCES].start + inner.io_end;
bridge->resource[PCI_BRIDGE_RESOURCES+1].end =
bridge->resource[PCI_BRIDGE_RESOURCES+1].start + inner.mem_end;
/* adjust parent's resource requirements */
if (outer) {
outer->io_end = ROUND_UP(outer->io_end, 4*1024);
......
arch/alpha/kernel/pci_iommu.c
View file @ bdd9c8e5
......@@ -97,10 +97,6 @@ iommu_arena_alloc(struct pci_iommu_arena *arena, long n)
}
if (i < n) {
/* Reached the end. Flush the TLB and restart the
search from the beginning. */
alpha_mv.mv_pci_tbi(arena->hose, 0, -1);
p = 0, i = 0;
while (i < n && p+i < nent) {
if (ptes[p+i])
......@@ -139,7 +135,7 @@ iommu_arena_free(struct pci_iommu_arena *arena, long ofs, long n)
p[i] = 0;
}
/* Map a single buffer of the indicate size for PCI DMA in streaming
/* Map a single buffer of the indicated size for PCI DMA in streaming
mode. The 32-bit PCI bus mastering address to use is returned.
Once the device is given the dma address, the device owns this memory
until either pci_unmap_single or pci_dma_sync_single is performed. */
......@@ -201,6 +197,7 @@ pci_map_single(struct pci_dev *pdev, void *cpu_addr, long size, int direction)
DBGA("pci_map_single: [%p,%lx] np %ld -> sg %x from %p\n",
cpu_addr, size, npages, ret, __builtin_return_address(0));
alpha_mv.mv_pci_tbi(hose, ret, ret + size - 1);
return ret;
}
......@@ -250,10 +247,6 @@ pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, long size,
npages = calc_npages((dma_addr & ~PAGE_MASK) + size);
iommu_arena_free(arena, dma_ofs, npages);
/* If we're freeing ptes above the `next_entry' pointer, they
may have snuck back into the TLB since the last wrap flush.
We need to flush the TLB before reallocating these. */
if (dma_ofs >= arena->next_entry)
alpha_mv.mv_pci_tbi(hose, dma_addr, dma_addr + size - 1);
DBGA("pci_unmap_single: sg [%x,%lx] np %ld from %p\n",
......@@ -441,6 +434,8 @@ sg_fill(struct scatterlist *leader, struct scatterlist *end,
#endif
} while (++sg < end && (int) sg->dma_address < 0);
alpha_mv.mv_pci_tbi(arena->hose, out->dma_address,
out->dma_address+out->dma_length-1);
return 1;
}
......@@ -574,10 +569,6 @@ pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
if (fend < tend) fend = tend;
}
/* If we're freeing ptes above the `next_entry' pointer, they
may have snuck back into the TLB since the last wrap flush.
We need to flush the TLB before reallocating these. */
if ((fend - arena->dma_base) >> PAGE_SHIFT >= arena->next_entry)
alpha_mv.mv_pci_tbi(hose, fbeg, fend);
DBGA("pci_unmap_sg: %d entries\n", nents - (end - sg));
......
arch/alpha/kernel/proto.h
View file @ bdd9c8e5
......@@ -61,6 +61,13 @@ extern void t2_init_arch(void);
extern void t2_machine_check(u64, u64, struct pt_regs *);
#define t2_pci_tbi ((void *)0)
/* core_titan.c */
extern struct pci_ops titan_pci_ops;
extern void titan_init_arch(void);
extern void titan_kill_arch(int);
extern void titan_machine_check(u64, u64, struct pt_regs *);
extern void titan_pci_tbi(struct pci_controler *, dma_addr_t, dma_addr_t);
/* core_tsunami.c */
extern struct pci_ops tsunami_pci_ops;
extern void tsunami_init_arch(void);
......@@ -68,9 +75,19 @@ extern void tsunami_kill_arch(int);
extern void tsunami_machine_check(u64, u64, struct pt_regs *);
extern void tsunami_pci_tbi(struct pci_controler *, dma_addr_t, dma_addr_t);
/* core_wildfire.c */
extern struct pci_ops wildfire_pci_ops;
extern void wildfire_init_arch(void);
extern void wildfire_kill_arch(int);
extern void wildfire_machine_check(u64, u64, struct pt_regs *);
extern void wildfire_pci_tbi(struct pci_controler *, dma_addr_t, dma_addr_t);
/* setup.c */
extern unsigned long srm_hae;
extern int boot_cpuid;
extern int srmcons_output;
extern void register_srm_console(void);
extern void unregister_srm_console(void);
/* smp.c */
extern void setup_smp(void);
......@@ -129,7 +146,8 @@ extern void dik_show_regs(struct pt_regs *regs, unsigned long *r9_15);
extern void die_if_kernel(char *, struct pt_regs *, long, unsigned long *);
/* ../mm/init.c */
void srm_paging_stop(void);
extern void switch_to_system_map(void);
extern void srm_paging_stop(void);
/* irq.c */
......
arch/alpha/kernel/ptrace.c
View file @ bdd9c8e5
......@@ -246,18 +246,23 @@ sys_ptrace(long request, long pid, long addr, long data,
ret = -EPERM;
if (request == PTRACE_TRACEME) {
/* are we already being traced? */
if (current->flags & PF_PTRACED)
goto out;
/* set the ptrace bit in the process flags. */
current->flags |= PF_PTRACED;
if (current->ptrace & PT_PTRACED)
goto out_notsk;
/* set the ptrace bit in the process ptrace flags. */
current->ptrace |= PT_PTRACED;
ret = 0;
goto out;
goto out_notsk;
}
if (pid == 1) /* you may not mess with init */
goto out;
goto out_notsk;
ret = -ESRCH;
if (!(child = find_task_by_pid(pid)))
goto out;
read_lock(&tasklist_lock);
child = find_task_by_pid(pid);
if (child)
get_task_struct(child);
read_unlock(&tasklist_lock);
if (!child)
goto out_notsk;
if (request == PTRACE_ATTACH) {
ret = -EPERM;
if (child == current)
......@@ -273,20 +278,22 @@ sys_ptrace(long request, long pid, long addr, long data,
&& !capable(CAP_SYS_PTRACE))
goto out;
/* the same process cannot be attached many times */
if (child->flags & PF_PTRACED)
if (child->ptrace & PT_PTRACED)
goto out;
child->flags |= PF_PTRACED;
child->ptrace |= PT_PTRACED;
write_lock_irq(&tasklist_lock);
if (child->p_pptr != current) {
REMOVE_LINKS(child);
child->p_pptr = current;
SET_LINKS(child);
}
write_unlock_irq(&tasklist_lock);
send_sig(SIGSTOP, child, 1);
ret = 0;
goto out;
}
ret = -ESRCH;
if (!(child->flags & PF_PTRACED)) {
if (!(child->ptrace & PT_PTRACED)) {
DBG(DBG_MEM, ("child not traced\n"));
goto out;
}
......@@ -343,9 +350,9 @@ sys_ptrace(long request, long pid, long addr, long data,
if ((unsigned long) data > _NSIG)
goto out;
if (request == PTRACE_SYSCALL)
child->flags |= PF_TRACESYS;
child->ptrace |= PT_TRACESYS;
else
child->flags &= ~PF_TRACESYS;
child->ptrace &= ~PT_TRACESYS;
child->exit_code = data;
wake_up_process(child);
/* make sure single-step breakpoint is gone. */
......@@ -373,7 +380,7 @@ sys_ptrace(long request, long pid, long addr, long data,
if ((unsigned long) data > _NSIG)
goto out;
child->thread.bpt_nsaved = -1; /* mark single-stepping */
child->flags &= ~PF_TRACESYS;
child->ptrace &= ~PT_TRACESYS;
wake_up_process(child);
child->exit_code = data;
/* give it a chance to run. */
......@@ -384,12 +391,14 @@ sys_ptrace(long request, long pid, long addr, long data,
ret = -EIO;
if ((unsigned long) data > _NSIG)
goto out;
child->flags &= ~(PF_PTRACED|PF_TRACESYS);
child->ptrace &= ~(PT_PTRACED|PT_TRACESYS);
wake_up_process(child);
child->exit_code = data;
write_lock_irq(&tasklist_lock);
REMOVE_LINKS(child);
child->p_pptr = child->p_opptr;
SET_LINKS(child);
write_unlock_irq(&tasklist_lock);
/* make sure single-step breakpoint is gone. */
ptrace_cancel_bpt(child);
ret = 0;
......@@ -400,6 +409,8 @@ sys_ptrace(long request, long pid, long addr, long data,
goto out;
}
out:
free_task_struct(child);
out_notsk:
unlock_kernel();
return ret;
}
......@@ -407,8 +418,8 @@ sys_ptrace(long request, long pid, long addr, long data,
asmlinkage void
syscall_trace(void)
{
if ((current->flags & (PF_PTRACED|PF_TRACESYS))
!= (PF_PTRACED|PF_TRACESYS))
if ((current->ptrace & (PT_PTRACED|PT_TRACESYS))
!= (PT_PTRACED|PT_TRACESYS))
return;
current->exit_code = SIGTRAP;
current->state = TASK_STOPPED;
......
arch/alpha/kernel/setup.c
View file @ bdd9c8e5
This diff is collapsed.
arch/alpha/kernel/signal.c
View file @ bdd9c8e5
......@@ -651,7 +651,7 @@ do_signal(sigset_t *oldset, struct pt_regs * regs, struct switch_stack * sw,
if (!signr)
break;
if ((current->flags & PF_PTRACED) && signr != SIGKILL) {
if ((current->ptrace & PT_PTRACED) && signr != SIGKILL) {
/* Let the debugger run. */
current->exit_code = signr;
current->state = TASK_STOPPED;
......
arch/alpha/kernel/smc37c669.c
View file @ bdd9c8e5
......@@ -2588,6 +2588,9 @@ void __init SMC669_Init ( int index )
);
SMC37c669_enable_device( FLOPPY_0 );
/* Wake up sometimes forgotten floppy, especially on DP264. */
outb(0xc, 0x3f2);
SMC37c669_disable_device( IDE_0 );
#if SMC_DEBUG
......
arch/alpha/kernel/smp.c
View file @ bdd9c8e5
......@@ -212,8 +212,19 @@ smp_tune_scheduling (void)
freq = hwrpb->cycle_freq ? : est_cycle_freq;
#if 0
/* Magic estimation stolen from x86 port. */
cacheflush_time = freq / 1024 * on_chip_cache / 5000;
cacheflush_time = freq / 1024L * on_chip_cache / 5000L;
printk("Using heuristic of %d cycles.\n",
cacheflush_time);
#else
/* Magic value to force potential preemption of other CPUs. */
cacheflush_time = INT_MAX;
printk("Using heuristic of %d cycles.\n",
cacheflush_time);
#endif
}
/*
......@@ -325,8 +336,8 @@ recv_secondary_console_msg(void)
}
}
printk(KERN_INFO "recv_secondary_console_msg: on %d "
"message is '%s'\n", mycpu, buf);
DBGS((KERN_INFO "recv_secondary_console_msg: on %d "
"message is '%s'\n", mycpu, buf));
}
hwrpb->txrdy = 0;
......@@ -361,8 +372,10 @@ secondary_cpu_start(int cpuid, struct task_struct *idle)
hwpcb->flags = idle->thread.pal_flags;
hwpcb->res1 = hwpcb->res2 = 0;
#if 0
DBGS(("KSP 0x%lx PTBR 0x%lx VPTBR 0x%lx UNIQUE 0x%lx\n",
hwpcb->ksp, hwpcb->ptbr, hwrpb->vptb, hwcpb->unique));
#endif
DBGS(("Starting secondary cpu %d: state 0x%lx pal_flags 0x%lx\n",
cpuid, idle->state, idle->thread.pal_flags));
......@@ -738,8 +751,10 @@ handle_ipi(struct pt_regs *regs)
unsigned long *pending_ipis = &ipi_data[this_cpu].bits;
unsigned long ops;
DBGS(("handle_ipi: on CPU %d ops 0x%x PC 0x%lx\n",
#if 0
DBGS(("handle_ipi: on CPU %d ops 0x%lx PC 0x%lx\n",
this_cpu, *pending_ipis, regs->pc));
#endif
mb(); /* Order interrupt and bit testing. */
while ((ops = xchg(pending_ipis, 0)) != 0) {
......
arch/alpha/kernel/sys_dp264.c
View file @ bdd9c8e5
......@@ -36,7 +36,7 @@
/* Note mask bit is true for ENABLED irqs. */
static unsigned long cached_irq_mask;
/* dp264 boards handle at max four CPUs */
static unsigned long cpu_irq_affinity[4] = { ~0UL, ~0UL, ~0UL, ~0UL };
static unsigned long cpu_irq_affinity[4] = { 0UL, 0UL, 0UL, 0UL };
spinlock_t dp264_irq_lock = SPIN_LOCK_UNLOCKED;
......@@ -52,6 +52,7 @@ tsunami_update_irq_hw(unsigned long mask)
volatile unsigned long *dim0, *dim1, *dim2, *dim3;
unsigned long mask0, mask1, mask2, mask3, dummy;
mask &= ~isa_enable;
mask0 = mask & cpu_irq_affinity[0];
mask1 = mask & cpu_irq_affinity[1];
mask2 = mask & cpu_irq_affinity[2];
......@@ -170,7 +171,6 @@ cpu_set_irq_affinity(unsigned int irq, unsigned long affinity)
aff &= ~(1UL << irq);
cpu_irq_affinity[cpu] = aff;
}
}
static void
......@@ -275,7 +275,12 @@ clipper_srm_device_interrupt(unsigned long vector, struct pt_regs * regs)
irq = (vector - 0x800) >> 4;
/*
#if 0
printk("clipper_srm_device_interrupt: vector 0x%lx IRQ %d cpu %d\n",
vector, irq, smp_processor_id());
#endif
/*
* The SRM console reports PCI interrupts with a vector calculated by:
*
* 0x900 + (0x10 * DRIR-bit)
......
arch/alpha/kernel/sys_mikasa.c
View file @ bdd9c8e5
......@@ -185,8 +185,8 @@ static void
mikasa_apecs_machine_check(unsigned long vector, unsigned long la_ptr,
struct pt_regs * regs)
{
#define MCHK_NO_DEVSEL 0x205L
#define MCHK_NO_TABT 0x204L
#define MCHK_NO_DEVSEL 0x205U
#define MCHK_NO_TABT 0x204U
struct el_common *mchk_header;
unsigned int code;
......
arch/alpha/kernel/sys_titan.c 0 → 100644
View file @ bdd9c8e5
/*
* linux/arch/alpha/kernel/sys_titan.c
*
* Copyright (C) 1995 David A Rusling
* Copyright (C) 1996, 1999 Jay A Estabrook
* Copyright (C) 1998, 1999 Richard Henderson
* Copyright (C) 1999, 2000 Jeff Wiedemeier
*
* Code supporting TITAN systems (EV6+TITAN), currently:
* Privateer
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/bitops.h>
#include <asm/mmu_context.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/core_titan.h>
#include <asm/hwrpb.h>
#include "proto.h"
#include "irq_impl.h"
#include "pci_impl.h"
#include "machvec_impl.h"
/* Note mask bit is true for ENABLED irqs. */
static unsigned long cached_irq_mask;
/* Titan boards handle at most four CPUs. */
static unsigned long cpu_irq_affinity[4] = { ~0UL, ~0UL, ~0UL, ~0UL };
spinlock_t titan_irq_lock = SPIN_LOCK_UNLOCKED;
static void
titan_update_irq_hw(unsigned long mask)
{
register titan_cchip *cchip = TITAN_cchip;
unsigned long isa_enable = 1UL << 55;
register int bcpu = boot_cpuid;
#ifdef CONFIG_SMP
register unsigned long cpm = cpu_present_mask;
volatile unsigned long *dim0, *dim1, *dim2, *dim3;
unsigned long mask0, mask1, mask2, mask3, dummy;
mask &= ~isa_enable;
mask0 = mask & cpu_irq_affinity[0];
mask1 = mask & cpu_irq_affinity[1];
mask2 = mask & cpu_irq_affinity[2];
mask3 = mask & cpu_irq_affinity[3];
if (bcpu == 0) mask0 |= isa_enable;
else if (bcpu == 1) mask1 |= isa_enable;
else if (bcpu == 2) mask2 |= isa_enable;
else mask3 |= isa_enable;
dim0 = &cchip->dim0.csr;
dim1 = &cchip->dim1.csr;
dim2 = &cchip->dim2.csr;
dim3 = &cchip->dim3.csr;
if ((cpm & 1) == 0) dim0 = &dummy;
if ((cpm & 2) == 0) dim1 = &dummy;
if ((cpm & 4) == 0) dim2 = &dummy;
if ((cpm & 8) == 0) dim3 = &dummy;
*dim0 = mask0;
*dim1 = mask1;
*dim2 = mask2;
*dim3 = mask3;
mb();
*dim0;
*dim1;
*dim2;
*dim3;
#else
volatile unsigned long *dimB;
if (bcpu == 0) dimB = &cchip->dim0.csr;
else if (bcpu == 1) dimB = &cchip->dim1.csr;
else if (bcpu == 2) dimB = &cchip->dim2.csr;
else if (bcpu == 3) dimB = &cchip->dim3.csr;
*dimB = mask | isa_enable;
mb();
*dimB;
#endif
}
static inline void
privateer_enable_irq(unsigned int irq)
{
spin_lock(&titan_irq_lock);
cached_irq_mask |= 1UL << (irq - 16);
titan_update_irq_hw(cached_irq_mask);
spin_unlock(&titan_irq_lock);
}
static inline void
privateer_disable_irq(unsigned int irq)
{
spin_lock(&titan_irq_lock);
cached_irq_mask &= ~(1UL << (irq - 16));
titan_update_irq_hw(cached_irq_mask);
spin_unlock(&titan_irq_lock);
}
static unsigned int
privateer_startup_irq(unsigned int irq)
{
privateer_enable_irq(irq);
return 0; /* never anything pending */
}
static void
privateer_end_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
privateer_enable_irq(irq);
}
static void
cpu_set_irq_affinity(unsigned int irq, unsigned long affinity)
{
int cpu;
for (cpu = 0; cpu < 4; cpu++) {
if (affinity & (1UL << cpu))
cpu_irq_affinity[cpu] |= 1UL << irq;
else
cpu_irq_affinity[cpu] &= ~(1UL << irq);
}
}
static void
privateer_set_affinity(unsigned int irq, unsigned long affinity)
{
spin_lock(&titan_irq_lock);
cpu_set_irq_affinity(irq - 16, affinity);
titan_update_irq_hw(cached_irq_mask);
spin_unlock(&titan_irq_lock);
}
static struct hw_interrupt_type privateer_irq_type = {
typename: "PRIVATEER",
startup: privateer_startup_irq,
shutdown: privateer_disable_irq,
enable: privateer_enable_irq,
disable: privateer_disable_irq,
ack: privateer_disable_irq,
end: privateer_end_irq,
set_affinity: privateer_set_affinity,
};
static void
privateer_device_interrupt(unsigned long vector, struct pt_regs * regs)
{
printk("privateer_device_interrupt: NOT IMPLEMENTED YET!! \n");
}
static void
privateer_srm_device_interrupt(unsigned long vector, struct pt_regs * regs)
{
int irq;
irq = (vector - 0x800) >> 4;
handle_irq(irq, regs);
}
static void __init
init_titan_irqs(struct hw_interrupt_type * ops, int imin, int imax)
{
long i;
for(i = imin; i <= imax; ++i) {
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i].handler = ops;
}
}
static void __init
privateer_init_irq(void)
{
extern asmlinkage void entInt(void);
int cpu;
outb(0, DMA1_RESET_REG);
outb(0, DMA2_RESET_REG);
outb(DMA_MODE_CASCADE, DMA2_MODE_REG);
outb(0, DMA2_MASK_REG);
if (alpha_using_srm)
alpha_mv.device_interrupt = privateer_srm_device_interrupt;
titan_update_irq_hw(0UL);
init_i8259a_irqs();
init_titan_irqs(&privateer_irq_type, 16, 63 + 16);
}
/*
* Privateer PCI Fixup configuration.
*
* PCHIP 0 BUS 0 (Hose 0)
*
* IDSEL Dev What
* ----- --- ----
* 18 7 Embedded Southbridge
* 19 8 Slot 0
* 20 9 Slot 1
* 21 10 Slot 2
* 22 11 Slot 3
* 23 12 Embedded HotPlug controller
* 27 16 Embedded Southbridge IDE
* 29 18 Embedded Southbridge PMU
* 31 20 Embedded Southbridge USB
*
* PCHIP 1 BUS 0 (Hose 1)
*
* IDSEL Dev What
* ----- --- ----
* 12 1 Slot 0
* 13 2 Slot 1
* 17 6 Embedded hotPlug controller
*
* PCHIP 0 BUS 1 (Hose 2)
*
* IDSEL What
* ----- ----
* NONE AGP
*
* PCHIP 1 BUS 1 (Hose 3)
*
* IDSEL Dev What
* ----- --- ----
* 12 1 Slot 0
* 13 2 Slot 1
* 17 6 Embedded hotPlug controller
*
* Summary @ TITAN_CSR_DIM0:
* Bit Meaning
* 0-7 Unused
* 8 PCHIP 0 BUS 1 YUKON (if present)
* 9 PCHIP 1 BUS 1 YUKON
* 10 PCHIP 1 BUS 0 YUKON
* 11 PCHIP 0 BUS 0 YUKON
* 12 PCHIP 0 BUS 0 SLOT 2 INT A
* 13 PCHIP 0 BUS 0 SLOT 2 INT B
* 14 PCHIP 0 BUS 0 SLOT 2 INT C
* 15 PCHIP 0 BUS 0 SLOT 2 INT D
* 16 PCHIP 0 BUS 0 SLOT 3 INT A
* 17 PCHIP 0 BUS 0 SLOT 3 INT B
* 18 PCHIP 0 BUS 0 SLOT 3 INT C
* 19 PCHIP 0 BUS 0 SLOT 3 INT D
* 20 PCHIP 0 BUS 0 SLOT 0 INT A
* 21 PCHIP 0 BUS 0 SLOT 0 INT B
* 22 PCHIP 0 BUS 0 SLOT 0 INT C
* 23 PCHIP 0 BUS 0 SLOT 0 INT D
* 24 PCHIP 0 BUS 0 SLOT 1 INT A
* 25 PCHIP 0 BUS 0 SLOT 1 INT B
* 26 PCHIP 0 BUS 0 SLOT 1 INT C
* 27 PCHIP 0 BUS 0 SLOT 1 INT D
* 28 PCHIP 1 BUS 0 SLOT 0 INT A
* 29 PCHIP 1 BUS 0 SLOT 0 INT B
* 30 PCHIP 1 BUS 0 SLOT 0 INT C
* 31 PCHIP 1 BUS 0 SLOT 0 INT D
* 32 PCHIP 1 BUS 0 SLOT 1 INT A
* 33 PCHIP 1 BUS 0 SLOT 1 INT B
* 34 PCHIP 1 BUS 0 SLOT 1 INT C
* 35 PCHIP 1 BUS 0 SLOT 1 INT D
* 36 PCHIP 1 BUS 1 SLOT 0 INT A
* 37 PCHIP 1 BUS 1 SLOT 0 INT B
* 38 PCHIP 1 BUS 1 SLOT 0 INT C
* 39 PCHIP 1 BUS 1 SLOT 0 INT D
* 40 PCHIP 1 BUS 1 SLOT 1 INT A
* 41 PCHIP 1 BUS 1 SLOT 1 INT B
* 42 PCHIP 1 BUS 1 SLOT 1 INT C
* 43 PCHIP 1 BUS 1 SLOT 1 INT D
* 44 AGP INT A
* 45 AGP INT B
* 46-47 Unused
* 49 Reserved for Sleep mode
* 50 Temperature Warning (optional)
* 51 Power Warning (optional)
* 52 Reserved
* 53 South Bridge NMI
* 54 South Bridge SMI INT
* 55 South Bridge ISA Interrupt
* 56-58 Unused
* 59 PCHIP1_C_ERROR
* 60 PCHIP0_C_ERROR
* 61 PCHIP1_H_ERROR
* 62 PCHIP0_H_ERROR
* 63 Reserved
*
*/
static int __init
privateer_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
u8 irq;
pcibios_read_config_byte(dev->bus->number,
dev->devfn,
PCI_INTERRUPT_LINE,
&irq);
/* is it routed through ISA? */
if ((irq & 0xF0) == 0xE0)
return (int)irq;
return (int)irq + 16; /* HACK -- this better only be called once */
}
#ifdef CONFIG_VGA_HOSE
static struct pci_controler * __init
privateer_vga_hose_select(struct pci_controler *h1, struct pci_controler *h2)
{
struct pci_controler *hose = h1;
int agp1, agp2;
/* which hose(s) are agp? */
agp1 = (0 != (TITAN_agp & (1 << h1->index)));
agp2 = (0 != (TITAN_agp & (1 << h2->index)));
hose = h1; /* default to h1 */
if (agp1 ^ agp2) {
if (agp2) hose = h2; /* take agp if only one */
} else if (h2->index < h1->index)
hose = h2; /* first hose if 2xpci or 2xagp */
return hose;
}
#endif
static void __init
privateer_init_pci(void)
{
common_init_pci();
SMC669_Init(0);
#ifdef CONFIG_VGA_HOSE
locate_and_init_vga(privateer_vga_hose_select);
#endif
}
void
privateer_machine_check(unsigned long vector, unsigned long la_ptr,
struct pt_regs * regs)
{
/* only handle system events here */
if (vector != SCB_Q_SYSEVENT)
return titan_machine_check(vector, la_ptr, regs);
/* it's a system event, handle it here */
printk("PRIVATEER 680 Machine Check on CPU %d\n", smp_processor_id());
}
/*
* The System Vectors
*/
struct alpha_machine_vector privateer_mv __initmv = {
vector_name: "PRIVATEER",
DO_EV6_MMU,
DO_DEFAULT_RTC,
DO_TITAN_IO,
DO_TITAN_BUS,
machine_check: privateer_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: DEFAULT_MEM_BASE,
nr_irqs: 80, /* 64 + 16 */
device_interrupt: privateer_device_interrupt,
init_arch: titan_init_arch,
init_irq: privateer_init_irq,
init_rtc: common_init_rtc,
init_pci: privateer_init_pci,
kill_arch: titan_kill_arch,
pci_map_irq: privateer_map_irq,
pci_swizzle: common_swizzle,
};
ALIAS_MV(privateer)
arch/alpha/kernel/sys_wildfire.c 0 → 100644
View file @ bdd9c8e5
/*
* linux/arch/alpha/kernel/sys_wildfire.c
*
* Wildfire support.
*
* Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/bitops.h>
#include <asm/mmu_context.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/core_wildfire.h>
#include <asm/hwrpb.h>
#include "proto.h"
#include "irq_impl.h"
#include "pci_impl.h"
#include "machvec_impl.h"
static unsigned long cached_irq_mask[WILDFIRE_NR_IRQS/(sizeof(long)*8)];
spinlock_t wildfire_irq_lock = SPIN_LOCK_UNLOCKED;
static int doing_init_irq_hw = 0;
static void
wildfire_update_irq_hw(unsigned int irq)
{
int qbbno = (irq >> 8) & (WILDFIRE_MAX_QBB - 1);
int pcano = (irq >> 6) & (WILDFIRE_PCA_PER_QBB - 1);
wildfire_pca *pca;
volatile unsigned long * enable0;
if (!WILDFIRE_PCA_EXISTS(qbbno, pcano)) {
if (!doing_init_irq_hw) {
printk(KERN_ERR "wildfire_update_irq_hw:"
" got irq %d for non-existent PCA %d"
" on QBB %d.\n",
irq, pcano, qbbno);
}
return;
}
pca = WILDFIRE_pca(qbbno, pcano);
enable0 = (unsigned long *) &pca->pca_int[0].enable; /* ??? */
*enable0 = cached_irq_mask[qbbno * WILDFIRE_PCA_PER_QBB + pcano];
mb();
*enable0;
}
static void __init
wildfire_init_irq_hw(void)
{
#if 0
register wildfire_pca * pca = WILDFIRE_pca(0, 0);
volatile unsigned long * enable0, * enable1, * enable2, *enable3;
volatile unsigned long * target0, * target1, * target2, *target3;
enable0 = (unsigned long *) &pca->pca_int[0].enable;
enable1 = (unsigned long *) &pca->pca_int[1].enable;
enable2 = (unsigned long *) &pca->pca_int[2].enable;
enable3 = (unsigned long *) &pca->pca_int[3].enable;
target0 = (unsigned long *) &pca->pca_int[0].target;
target1 = (unsigned long *) &pca->pca_int[1].target;
target2 = (unsigned long *) &pca->pca_int[2].target;
target3 = (unsigned long *) &pca->pca_int[3].target;
*enable0 = *enable1 = *enable2 = *enable3 = 0;
*target0 = (1UL<<8) | WILDFIRE_QBB(0);
*target1 = *target2 = *target3 = 0;
mb();
*enable0; *enable1; *enable2; *enable3;
*target0; *target1; *target2; *target3;
#else
int i;
doing_init_irq_hw = 1;
/* Need to update only once for every possible PCA. */
for (i = 0; i < WILDFIRE_NR_IRQS; i+=WILDFIRE_IRQ_PER_PCA)
wildfire_update_irq_hw(i);
doing_init_irq_hw = 0;
#endif
}
static void
wildfire_enable_irq(unsigned int irq)
{
if (irq < 16)
i8259a_enable_irq(irq);
spin_lock(&wildfire_irq_lock);
set_bit(irq, &cached_irq_mask);
wildfire_update_irq_hw(irq);
spin_unlock(&wildfire_irq_lock);
}
static void
wildfire_disable_irq(unsigned int irq)
{
if (irq < 16)
i8259a_disable_irq(irq);
spin_lock(&wildfire_irq_lock);
clear_bit(irq, &cached_irq_mask);
wildfire_update_irq_hw(irq);
spin_unlock(&wildfire_irq_lock);
}
static void
wildfire_mask_and_ack_irq(unsigned int irq)
{
if (irq < 16)
i8259a_mask_and_ack_irq(irq);
spin_lock(&wildfire_irq_lock);
clear_bit(irq, &cached_irq_mask);
wildfire_update_irq_hw(irq);
spin_unlock(&wildfire_irq_lock);
}
static unsigned int
wildfire_startup_irq(unsigned int irq)
{
wildfire_enable_irq(irq);
return 0; /* never anything pending */
}
static void
wildfire_end_irq(unsigned int irq)
{
#if 0
if (!irq_desc[irq].action)
printk("got irq %d\n", irq);
#endif
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
wildfire_enable_irq(irq);
}
static struct hw_interrupt_type wildfire_irq_type = {
typename: "WILDFIRE",
startup: wildfire_startup_irq,
shutdown: wildfire_disable_irq,
enable: wildfire_enable_irq,
disable: wildfire_disable_irq,
ack: wildfire_mask_and_ack_irq,
end: wildfire_end_irq,
};
static void __init
wildfire_init_irq_per_pca(int qbbno, int pcano)
{
int i, irq_bias;
unsigned long io_bias;
static struct irqaction isa_enable = {
handler: no_action,
name: "isa_enable",
};
irq_bias = qbbno * (WILDFIRE_PCA_PER_QBB * WILDFIRE_IRQ_PER_PCA)
+ pcano * WILDFIRE_IRQ_PER_PCA;
/* Only need the following for first PCI bus per PCA. */
io_bias = WILDFIRE_IO(qbbno, pcano<<1) - WILDFIRE_IO_BIAS;
#if 0
outb(0, DMA1_RESET_REG + io_bias);
outb(0, DMA2_RESET_REG + io_bias);
outb(DMA_MODE_CASCADE, DMA2_MODE_REG + io_bias);
outb(0, DMA2_MASK_REG + io_bias);
#endif
#if 0
/* ??? Not sure how to do this, yet... */
init_i8259a_irqs(); /* ??? */
#endif
for (i = 0; i < 16; ++i) {
if (i == 2)
continue;
irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i+irq_bias].handler = &wildfire_irq_type;
}
irq_desc[36+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[36+irq_bias].handler = &wildfire_irq_type;
for (i = 40; i < 64; ++i) {
irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i+irq_bias].handler = &wildfire_irq_type;
}
setup_irq(32+irq_bias, &isa_enable);
}
static void __init
wildfire_init_irq(void)
{
int qbbno, pcano;
#if 1
wildfire_init_irq_hw();
init_i8259a_irqs();
#endif
for (qbbno = 0; qbbno < WILDFIRE_MAX_QBB; qbbno++) {
if (WILDFIRE_QBB_EXISTS(qbbno)) {
for (pcano = 0; pcano < WILDFIRE_PCA_PER_QBB; pcano++) {
if (WILDFIRE_PCA_EXISTS(qbbno, pcano)) {
wildfire_init_irq_per_pca(qbbno, pcano);
}
}
}
}
}
static void
wildfire_device_interrupt(unsigned long vector, struct pt_regs * regs)
{
int irq;
irq = (vector - 0x800) >> 4;
/*
* bits 10-8: source QBB ID
* bits 7-6: PCA
* bits 5-0: irq in PCA
*/
handle_irq(irq, regs);
return;
}
/*
* PCI Fixup configuration.
*
* Summary per PCA (2 PCI or HIPPI buses):
*
* Bit Meaning
* 0-15 ISA
*
*32 ISA summary
*33 SMI
*34 NMI
*36 builtin QLogic SCSI (or slot 0 if no IO module)
*40 Interrupt Line A from slot 2 PCI0
*41 Interrupt Line B from slot 2 PCI0
*42 Interrupt Line C from slot 2 PCI0
*43 Interrupt Line D from slot 2 PCI0
*44 Interrupt Line A from slot 3 PCI0
*45 Interrupt Line B from slot 3 PCI0
*46 Interrupt Line C from slot 3 PCI0
*47 Interrupt Line D from slot 3 PCI0
*
*48 Interrupt Line A from slot 4 PCI1
*49 Interrupt Line B from slot 4 PCI1
*50 Interrupt Line C from slot 4 PCI1
*51 Interrupt Line D from slot 4 PCI1
*52 Interrupt Line A from slot 5 PCI1
*53 Interrupt Line B from slot 5 PCI1
*54 Interrupt Line C from slot 5 PCI1
*55 Interrupt Line D from slot 5 PCI1
*56 Interrupt Line A from slot 6 PCI1
*57 Interrupt Line B from slot 6 PCI1
*58 Interrupt Line C from slot 6 PCI1
*50 Interrupt Line D from slot 6 PCI1
*60 Interrupt Line A from slot 7 PCI1
*61 Interrupt Line B from slot 7 PCI1
*62 Interrupt Line C from slot 7 PCI1
*63 Interrupt Line D from slot 7 PCI1
*
*
* IdSel
* 0 Cypress Bridge I/O (ISA summary interrupt)
* 1 64 bit PCI 0 option slot 1 (SCSI QLogic builtin)
* 2 64 bit PCI 0 option slot 2
* 3 64 bit PCI 0 option slot 3
* 4 64 bit PCI 1 option slot 4
* 5 64 bit PCI 1 option slot 5
* 6 64 bit PCI 1 option slot 6
* 7 64 bit PCI 1 option slot 7
*/
static int __init
wildfire_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
static char irq_tab[8][5] __initlocaldata = {
/*INT INTA INTB INTC INTD */
{ -1, -1, -1, -1, -1}, /* IdSel 0 ISA Bridge */
{ 36, 36, 36+1, 36+2, 36+3}, /* IdSel 1 SCSI builtin */
{ 40, 40, 40+1, 40+2, 40+3}, /* IdSel 2 PCI 0 slot 2 */
{ 44, 44, 44+1, 44+2, 44+3}, /* IdSel 3 PCI 0 slot 3 */
{ 48, 48, 48+1, 48+2, 48+3}, /* IdSel 4 PCI 1 slot 4 */
{ 52, 52, 52+1, 52+2, 52+3}, /* IdSel 5 PCI 1 slot 5 */
{ 56, 56, 56+1, 56+2, 56+3}, /* IdSel 6 PCI 1 slot 6 */
{ 60, 60, 60+1, 60+2, 60+3}, /* IdSel 7 PCI 1 slot 7 */
};
const long min_idsel = 0, max_idsel = 7, irqs_per_slot = 5;
struct pci_controler *hose = dev->sysdata;
int irq = COMMON_TABLE_LOOKUP;
if (irq > 0) {
int qbbno = hose->index >> 3;
int pcano = (hose->index >> 1) & 3;
irq += (qbbno << 8) + (pcano << 6);
}
return irq;
}
static void __init
wildfire_init_pci(void)
{
common_init_pci();
}
/*
* The System Vectors
*/
struct alpha_machine_vector wildfire_mv __initmv = {
vector_name: "WILDFIRE",
DO_EV6_MMU,
DO_DEFAULT_RTC,
DO_WILDFIRE_IO,
DO_WILDFIRE_BUS,
machine_check: wildfire_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: DEFAULT_MEM_BASE,
nr_irqs: WILDFIRE_NR_IRQS,
device_interrupt: wildfire_device_interrupt,
init_arch: wildfire_init_arch,
init_irq: wildfire_init_irq,
init_rtc: common_init_rtc,
init_pci: wildfire_init_pci,
kill_arch: wildfire_kill_arch,
pci_map_irq: wildfire_map_irq,
pci_swizzle: common_swizzle,
};
ALIAS_MV(wildfire)
arch/alpha/kernel/traps.c
View file @ bdd9c8e5
......@@ -27,30 +27,234 @@ dik_show_regs(struct pt_regs *regs, unsigned long *r9_15)
{
printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx\n",
regs->pc, regs->r26, regs->ps);
printk("r0 = %016lx r1 = %016lx r2 = %016lx\n",
printk("v0 = %016lx t0 = %016lx t1 = %016lx\n",
regs->r0, regs->r1, regs->r2);
printk("r3 = %016lx r4 = %016lx r5 = %016lx\n",
printk("t2 = %016lx t3 = %016lx t4 = %016lx\n",
regs->r3, regs->r4, regs->r5);
printk("r6 = %016lx r7 = %016lx r8 = %016lx\n",
printk("t5 = %016lx t6 = %016lx t7 = %016lx\n",
regs->r6, regs->r7, regs->r8);
if (r9_15) {
printk("r9 = %016lx r10= %016lx r11= %016lx\n",
printk("s0 = %016lx s1 = %016lx s2 = %016lx\n",
r9_15[9], r9_15[10], r9_15[11]);
printk("r12= %016lx r13= %016lx r14= %016lx\n",
printk("s3 = %016lx s4 = %016lx s5 = %016lx\n",
r9_15[12], r9_15[13], r9_15[14]);
printk("r15= %016lx\n", r9_15[15]);
printk("s6 = %016lx\n", r9_15[15]);
}
printk("r16= %016lx r17= %016lx r18= %016lx\n",
printk("a0 = %016lx a1 = %016lx a2 = %016lx\n",
regs->r16, regs->r17, regs->r18);
printk("r19= %016lx r20= %016lx r21= %016lx\n",
printk("a3 = %016lx a4 = %016lx a5 = %016lx\n",
regs->r19, regs->r20, regs->r21);
printk("r22= %016lx r23= %016lx r24= %016lx\n",
printk("t8 = %016lx t9 = %016lx t10= %016lx\n",
regs->r22, regs->r23, regs->r24);
printk("r25= %016lx r27= %016lx r28= %016lx\n",
printk("t11= %016lx pv = %016lx at = %016lx\n",
regs->r25, regs->r27, regs->r28);
printk("gp = %016lx sp = %p\n", regs->gp, regs+1);
#if 0
__halt();
#endif
}
static char * ireg_name[] = {"v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
"t7", "s0", "s1", "s2", "s3", "s4", "s5", "s6",
"a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
"t10", "t11", "ra", "pv", "at", "gp", "sp", "zero"};
static char * inst_name[] = {"call_pal", "", "", "", "", "", "", "",
"lda", "ldah", "ldbu", "ldq_u", "ldwu", "stw", "stb", "stq_u",
"ALU", "ALU", "ALU", "ALU", "SQRT", "FVAX", "FIEEE", "FLOAT",
"MISC", "PAL19", "JMP", "PAL1B", "GRAPH", "PAL1D", "PAL1E", "PAL1F",
"ldf", "ldg", "lds", "ldt", "stf", "stg", "sts", "stt",
"ldl", "ldq", "ldl_l", "ldq_l", "stl", "stq", "stl_c", "stq_c",
"br", "fbeq", "fblt", "fble", "bsr", "fbne", "fbge", "fbgt"
"blbc", "beq", "blt", "ble", "blbs", "bne", "bge", "bgt"
};
static char * jump_name[] = {"jmp", "jsr", "ret", "jsr_coroutine"};
typedef struct {int func; char * text;} alist;
static alist inta_name[] = {{0, "addl"}, {2, "s4addl"}, {9, "subl"},
{0xb, "s4subl"}, {0xf, "cmpbge"}, {0x12, "s8addl"}, {0x1b, "s8subl"},
{0x1d, "cmpult"}, {0x20, "addq"}, {0x22, "s4addq"}, {0x29, "subq"},
{0x2b, "s4subq"}, {0x2d, "cmpeq"}, {0x32, "s8addq"}, {0x3b, "s8subq"},
{0x3d, "cmpule"}, {0x40, "addl/v"}, {0x49, "subl/v"}, {0x4d, "cmplt"},
{0x60, "addq/v"}, {0x69, "subq/v"}, {0x6d, "cmple"}, {-1, 0}};
static alist intl_name[] = {{0, "and"}, {8, "andnot"}, {0x14, "cmovlbs"},
{0x16, "cmovlbc"}, {0x20, "or"}, {0x24, "cmoveq"}, {0x26, "cmovne"},
{0x28, "ornot"}, {0x40, "xor"}, {0x44, "cmovlt"}, {0x46, "cmovge"},
{0x48, "eqv"}, {0x61, "amask"}, {0x64, "cmovle"}, {0x66, "cmovgt"},
{0x6c, "implver"}, {-1, 0}};
static alist ints_name[] = {{2, "mskbl"}, {6, "extbl"}, {0xb, "insbl"},
{0x12, "mskwl"}, {0x16, "extwl"}, {0x1b, "inswl"}, {0x22, "mskll"},
{0x26, "extll"}, {0x2b, "insll"}, {0x30, "zap"}, {0x31, "zapnot"},
{0x32, "mskql"}, {0x34, "srl"}, {0x36, "extql"}, {0x39, "sll"},
{0x3b, "insql"}, {0x3c, "sra"}, {0x52, "mskwh"}, {0x57, "inswh"},
{0x5a, "extwh"}, {0x62, "msklh"}, {0x67, "inslh"}, {0x6a, "extlh"},
{0x72, "mskqh"}, {0x77, "insqh"}, {0x7a, "extqh"}, {-1, 0}};
static alist intm_name[] = {{0, "mull"}, {0x20, "mulq"}, {0x30, "umulh"},
{0x40, "mull/v"}, {0x60, "mulq/v"}, {-1, 0}};
static alist * int_name[] = {inta_name, intl_name, ints_name, intm_name};
static char *
assoc(int fcode, alist * a)
{
while ((fcode != a->func) && (a->func != -1))
++a;
return a->text;
}
static char *
iname(unsigned int instr)
{
int opcode = instr >> 26;
char * name = inst_name[opcode];
switch (opcode) {
default:
break;
case 0x10:
case 0x11:
case 0x12:
case 0x13: {
char * specific_name
= assoc((instr >> 5) & 0x3f, int_name[opcode - 0x10]);
if (specific_name)
name = specific_name;
break;
}
case 0x1a:
name = jump_name[(instr >> 14) & 3];
break;
}
return name;
}
static enum {NOT_INST, PAL, BRANCH, MEMORY, JUMP, OPERATE, FOPERATE, MISC}
iformat(int opcode)
{
if (opcode >= 0x30)
return BRANCH;
if (opcode >= 0x20)
return MEMORY;
if (opcode == 0)
return PAL;
if (opcode < 8)
return NOT_INST;
if (opcode < 0x10)
return MEMORY;
if (opcode < 0x14)
return OPERATE;
if (opcode < 0x18)
return FOPERATE;
switch (opcode) {
case 0x18:
return MISC;
case 0x1A:
return JUMP;
case 0x1C:
return OPERATE;
default:
return NOT_INST;
}
}
/*
* The purpose here is to provide useful clues about a kernel crash, so
* less likely instructions, e.g. floating point, aren't fully decoded.
*/
static void
disassemble(unsigned int instr)
{
int optype = instr >> 26;
char buf[40], *s = buf;
s += sprintf(buf, "%08x %s ", instr, iname(instr));
switch (iformat(optype)) {
default:
case NOT_INST:
case MISC:
break;
case PAL:
s += sprintf(s, "%d", instr);
break;
case BRANCH: {
int reg = (instr >> 21) & 0x1f;
int offset = instr & 0x1fffff;
if (offset >= 0x100000)
offset -= 0x200000;
if (((optype & 3) == 0) || (optype >= 0x38)) {
if ((optype != 0x30) || (reg != 0x1f))
s += sprintf(s, "%s,", ireg_name[reg]);
} else
s += sprintf(s, "f%d,", reg);
s += sprintf(s, ".%+d", (offset + 1) << 2);
break;
}
case MEMORY: {
int addr_reg = (instr >> 16) & 0x1f;
int value_reg = (instr >> 21) & 0x1f;
int offset = instr & 0xffff;
if (offset >= 0x8000)
offset -= 0x10000;
if ((optype >= 0x20) && (optype < 0x28))
s += sprintf(s, "f%d", value_reg);
else
s += sprintf(s, "%s", ireg_name[value_reg]);
s += sprintf(s, ",%d(%s)", offset, ireg_name[addr_reg]);
break;
}
case JUMP: {
int target_reg = (instr >> 16) & 0x1f;
int return_reg = (instr >> 21) & 0x1f;
s += sprintf(s, "%s,", ireg_name[return_reg]);
s += sprintf(s, "(%s)", ireg_name[target_reg]);
break;
}
case OPERATE: {
int areg = (instr >> 21) & 0x1f;
int breg = (instr >> 16) & 0x1f;
int creg = instr & 0x1f;
int litflag = instr & (1<<12);
int lit = (instr >> 13) & 0xff;
s += sprintf(s, "%s,", ireg_name[areg]);
if (litflag)
s += sprintf(s, "%d", lit);
else
s += sprintf(s, "%s", ireg_name[breg]);
s += sprintf(s, ",%s", ireg_name[creg]);
break;
}
case FOPERATE: {
int areg = (instr >> 21) & 0x1f;
int breg = (instr >> 16) & 0x1f;
int creg = instr & 0x1f;
s += sprintf(s, "f%d,f%d,f%d", areg, breg, creg);
break;
}
}
buf[s-buf] = 0;
printk("%s\n", buf);
}
static void
......@@ -59,11 +263,12 @@ dik_show_code(unsigned int *pc)
long i;
printk("Code:");
for (i = -3; i < 6; i++) {
for (i = -6; i < 2; i++) {
unsigned int insn;
if (__get_user(insn, pc+i))
break;
printk("%c%08x%c",i?' ':'<',insn,i?' ':'>');
printk("%c", i ? ' ' : '*');
disassemble(insn);
}
printk("\n");
}
......@@ -81,8 +286,12 @@ dik_show_trace(unsigned long *sp)
continue;
if (tmp >= (unsigned long) &_etext)
continue;
printk(" [<%lx>]", tmp);
if (++i > 40) {
/*
* Assume that only the low 24-bits of a kernel text address
* is interesting.
*/
printk("%6x%c", (int)tmp & 0xffffff, (++i % 11) ? ' ' : '\n');
if (i > 40) {
printk(" ...");
break;
}
......@@ -450,7 +659,7 @@ do_entUna(void * va, unsigned long opcode, unsigned long reg,
got_exception:
/* Ok, we caught the exception, but we don't want it. Is there
someone to pass it along to? */
if ((fixup = search_exception_table(pc)) != 0) {
if ((fixup = search_exception_table(pc, regs.gp)) != 0) {
unsigned long newpc;
newpc = fixup_exception(una_reg, fixup, pc);
......
arch/alpha/lib/Makefile
View file @ bdd9c8e5
......@@ -2,13 +2,18 @@
# Makefile for alpha-specific library files..
#
.S.s:
$(CC) -D__ASSEMBLY__ $(AFLAGS) -E -o $*.s $<
.S.o:
$(CC) -D__ASSEMBLY__ $(AFLAGS) -c -o $*.o $<
OBJS = __divqu.o __remqu.o __divlu.o __remlu.o memset.o memcpy.o io.o \
checksum.o csum_partial_copy.o strlen.o \
strcat.o strcpy.o strncat.o strncpy.o stxcpy.o stxncpy.o \
strchr.o strrchr.o memchr.o \
copy_user.o clear_user.o strncpy_from_user.o strlen_user.o \
csum_ipv6_magic.o strcasecmp.o semaphore.o fpreg.o \
srm_dispatch.o srm_fixup.o srm_puts.o srm_printk.o
callback_srm.o callback_init.o srm_puts.o srm_printk.o
lib.a: $(OBJS)
$(AR) rcs lib.a $(OBJS)
......
arch/alpha/lib/callback_init.c 0 → 100644
View file @ bdd9c8e5
#include <linux/init.h>
#include <linux/sched.h>
#include <asm/page.h>
#include <asm/hwrpb.h>
#include <asm/console.h>
#include <asm/pgtable.h>
#include "../kernel/proto.h"
extern struct hwrpb_struct *hwrpb;
/* This is the SRM version. Maybe there will be a DBM version. */
int callback_init_done = 0;
void * __init callback_init(void * kernel_end)
{
int i, j;
unsigned long vaddr = CONSOLE_REMAP_START;
struct crb_struct * crb;
pgd_t * pgd = pgd_offset_k(vaddr);
pmd_t * pmd;
unsigned long two_pte_pages;
if (!alpha_using_srm) {
switch_to_system_map();
return kernel_end;
}
/* Allocate some memory for the pages. */
two_pte_pages = ((unsigned long)kernel_end + ~PAGE_MASK) & PAGE_MASK;
kernel_end = (void *)(two_pte_pages + 2*PAGE_SIZE);
memset((void *)two_pte_pages, 0, 2*PAGE_SIZE);
/* Starting at the HWRPB, locate the CRB. */
crb = (struct crb_struct *)((char *)hwrpb + hwrpb->crb_offset);
/* Tell the console whither the console is to be remapped. */
if (srm_fixup(vaddr, (unsigned long)hwrpb))
__halt(); /* "We're boned." --Bender */
/* Edit the procedure descriptors for DISPATCH and FIXUP. */
crb->dispatch_va = (struct procdesc_struct *)
(vaddr + (unsigned long)crb->dispatch_va - crb->map[0].va);
crb->fixup_va = (struct procdesc_struct *)
(vaddr + (unsigned long)crb->fixup_va - crb->map[0].va);
switch_to_system_map();
/*
* Set up the first and second level PTEs for console callbacks.
* There is an assumption here that only one of each is needed,
* and this allows for 8MB. Currently (late 1999), big consoles
* are still under 4MB.
*/
pgd_set(pgd, (pmd_t *)two_pte_pages);
pmd = pmd_offset(pgd, vaddr);
pmd_set(pmd, (pte_t *)(two_pte_pages + PAGE_SIZE));
/*
* Set up the third level PTEs and update the virtual addresses
* of the CRB entries.
*/
for (i = 0; i < crb->map_entries; ++i) {
unsigned long paddr = crb->map[i].pa;
crb->map[i].va = vaddr;
for (j = 0; j < crb->map[i].count; ++j) {
set_pte(pte_offset(pmd, vaddr),
mk_pte_phys(paddr, PAGE_KERNEL));
paddr += PAGE_SIZE;
vaddr += PAGE_SIZE;
}
}
callback_init_done = 1;
return kernel_end;
}
arch/alpha/lib/callback_srm.S 0 → 100644
View file @ bdd9c8e5
/*
* arch/alpha/lib/callback_srm.S
*/
#include <linux/config.h>
#include <asm/console.h>
.text
#define HWRPB_CRB_OFFSET 0xc0
#if defined(CONFIG_ALPHA_SRM) || defined(CONFIG_ALPHA_GENERIC)
.align 4
srm_dispatch:
#if defined(CONFIG_ALPHA_GENERIC)
ldl $4,alpha_using_srm
beq $4,nosrm
#endif
ldq $0,hwrpb # gp is set up by CALLBACK macro.
ldl $25,0($25) # Pick up the wrapper data.
mov $20,$21 # Shift arguments right.
mov $19,$20
ldq $1,HWRPB_CRB_OFFSET($0)
mov $18,$19
mov $17,$18
mov $16,$17
addq $0,$1,$2 # CRB address
ldq $27,0($2) # DISPATCH procedure descriptor (VMS call std)
extwl $25,0,$16 # SRM callback function code
ldq $3,8($27) # call address
extwl $25,2,$25 # argument information (VMS calling std)
jmp ($3) # Return directly to caller of wrapper.
.align 4
.globl srm_fixup
.ent srm_fixup
srm_fixup:
ldgp $29,0($27)
#if defined(CONFIG_ALPHA_GENERIC)
ldl $4,alpha_using_srm
beq $4,nosrm
#endif
ldq $0,hwrpb
ldq $1,HWRPB_CRB_OFFSET($0)
addq $0,$1,$2 # CRB address
ldq $27,16($2) # VA of FIXUP procedure descriptor
ldq $3,8($27) # call address
lda $25,2($31) # two integer arguments
jmp ($3) # Return directly to caller of srm_fixup.
.end srm_fixup
#if defined(CONFIG_ALPHA_GENERIC)
.align 3
nosrm:
lda $0,-1($31)
ret
#endif
#define CALLBACK(NAME, CODE, ARG_CNT) \
.align 4; .globl callback_##NAME; .ent callback_##NAME; callback_##NAME##: \
ldgp $29,0($27); br $25,srm_dispatch; .word CODE, ARG_CNT; .end callback_##NAME
#else /* defined(CONFIG_ALPHA_SRM) || defined(CONFIG_ALPHA_GENERIC) */
#define CALLBACK(NAME, CODE, ARG_CNT) \
.align 3; .globl callback_##NAME; .ent callback_##NAME; callback_##NAME##: \
lda $0,-1($31); ret; .end callback_##NAME
.align 3
.globl srm_fixup
.ent srm_fixup
srm_fixup:
lda $0,-1($31)
ret
.end srm_fixup
#endif /* defined(CONFIG_ALPHA_SRM) || defined(CONFIG_ALPHA_GENERIC) */
CALLBACK(puts, CCB_PUTS, 4)
CALLBACK(open, CCB_OPEN, 3)
CALLBACK(close, CCB_CLOSE, 2)
CALLBACK(read, CCB_READ, 5)
CALLBACK(getenv, CCB_GET_ENV, 4)
CALLBACK(setenv, CCB_SET_ENV, 4)
CALLBACK(getc, CCB_GETC, 2)
CALLBACK(reset_term, CCB_RESET_TERM, 2)
CALLBACK(term_int, CCB_SET_TERM_INT, 3)
CALLBACK(term_ctl, CCB_SET_TERM_CTL, 3)
CALLBACK(process_keycode, CCB_PROCESS_KEYCODE, 3)
CALLBACK(ioctl, CCB_IOCTL, 6)
CALLBACK(write, CCB_WRITE, 5)
CALLBACK(reset_env, CCB_RESET_ENV, 4)
CALLBACK(save_env, CCB_SAVE_ENV, 1)
CALLBACK(pswitch, CCB_PSWITCH, 3)
CALLBACK(bios_emul, CCB_BIOS_EMUL, 5)
.data
__alpha_using_srm: # For use by bootpheader
.long 7 # value is not 1 for link debugging
.weak alpha_using_srm; alpha_using_srm = __alpha_using_srm
__callback_init_done: # For use by bootpheader
.long 7 # value is not 1 for link debugging
.weak callback_init_done; callback_init_done = __callback_init_done
arch/alpha/lib/srm_dispatch.S deleted 100644 → 0
View file @ 6e14d18e
/*
* arch/alpha/lib/srm_dispatch.S
*/
.globl srm_dispatch
.ent srm_dispatch
srm_dispatch:
.frame $30,30,$26
subq $30,80,$30
stq $26,0($30)
stq $8,8($30)
stq $9,16($30)
stq $10,24($30)
stq $11,32($30)
stq $12,40($30)
stq $13,48($30)
stq $14,56($30)
stq $15,64($30)
stq $29,72($30)
.mask 0x2400FF00, -80
.prologue 0
ldq $1,hwrpb
ldq $2,0xc0($1) /* crb offset */
addq $2,$1,$2 /* crb */
ldq $27,0($2) /* dispatch procedure value */
ldq $2,8($27) /* dispatch call address */
jsr $26,($2) /* call it (weird VMS call seq) */
ldq $26,0($30)
ldq $8,8($30)
ldq $9,16($30)
ldq $10,24($30)
ldq $11,32($30)
ldq $12,40($30)
ldq $13,48($30)
ldq $14,56($30)
ldq $15,64($30)
ldq $29,72($30)
addq $30,80,$30
ret $31,($26),1
.end srm_dispatch
arch/alpha/lib/srm_fixup.S deleted 100644 → 0
View file @ 6e14d18e
/*
* arch/alpha/lib/srm_fixup.S
*/
.globl srm_fixup
.ent srm_fixup
srm_fixup:
.frame $30,30,$26
subq $30,80,$30
stq $26,0($30)
stq $8,8($30)
stq $9,16($30)
stq $10,24($30)
stq $11,32($30)
stq $12,40($30)
stq $13,48($30)
stq $14,56($30)
stq $15,64($30)
stq $29,72($30)
.mask 0x2400FF00, -80
.prologue 0
ldq $2,0xc0($17) /* crb offset */
addq $2,$1,$2 /* crb */
ldq $27,16($2) /* fixup procedure value */
ldq $2,8($27) /* dispatch call address */
jsr $26,($2) /* call it (weird VMS call seq) */
ldq $26,0($30)
ldq $8,8($30)
ldq $9,16($30)
ldq $10,24($30)
ldq $11,32($30)
ldq $12,40($30)
ldq $13,48($30)
ldq $14,56($30)
ldq $15,64($30)
ldq $29,72($30)
addq $30,80,$30
ret $31,($26),1
.end srm_fixup
arch/alpha/lib/srm_printk.c
View file @ bdd9c8e5
......@@ -9,13 +9,33 @@ long
srm_printk(const char *fmt, ...)
{
static char buf[1024];
va_list args;
long i;
va_list args;
long len, num_lf;
char *src, *dst;
va_start(args, fmt);
i = vsprintf(buf,fmt,args);
va_end(args);
va_start(args, fmt);
len = vsprintf(buf, fmt, args);
va_end(args);
srm_puts(buf);
return i;
/* count number of linefeeds in string: */
num_lf = 0;
for (src = buf; *src; ++src) {
if (*src == '\n') {
++num_lf;
}
}
if (num_lf) {
/* expand each linefeed into carriage-return/linefeed: */
for (dst = src + num_lf; src >= buf; ) {
if (*src == '\n') {
*dst-- = '\r';
}
*dst-- = *src--;
}
}
srm_puts(buf, num_lf+len);
return len;
}
arch/alpha/lib/srm_puts.c
View file @ bdd9c8e5
......@@ -5,30 +5,19 @@
#include <linux/string.h>
#include <asm/console.h>
void
srm_puts(const char *str)
long
srm_puts(const char *str, long len)
{
/* Expand \n to \r\n as we go. */
long remaining, written;
while (*str) {
long len;
const char *e = str;
if (!callback_init_done)
return len;
if (*str == '\n') {
if (srm_dispatch(CCB_PUTS, 0, "\r", 1) < 0)
return;
++e;
}
e = strchr(e, '\n') ? : strchr(e, '\0');
len = e - str;
while (len > 0) {
long written = srm_dispatch(CCB_PUTS, 0, str, len);
if (written < 0)
return;
len -= written & 0xffffffff;
str += written & 0xffffffff;
}
for (remaining = len; remaining > 0; remaining -= written)
{
written = callback_puts(0, str, remaining);
written &= 0xffffffff;
str += written;
}
return len;
}
arch/alpha/mm/extable.c
View file @ bdd9c8e5
......@@ -36,12 +36,12 @@ search_one_table(const struct exception_table_entry *first,
register unsigned long gp __asm__("$29");
unsigned
search_exception_table(unsigned long addr)
static unsigned
search_exception_table_without_gp(unsigned long addr)
{
unsigned ret;
#ifndef CONFIG_MODULE
#ifndef CONFIG_MODULES
/* There is only the kernel to search. */
ret = search_one_table(__start___ex_table, __stop___ex_table - 1,
addr - gp);
......@@ -60,3 +60,39 @@ search_exception_table(unsigned long addr)
return 0;
}
unsigned
search_exception_table(unsigned long addr, unsigned long exc_gp)
{
unsigned ret;
#ifndef CONFIG_MODULES
ret = search_one_table(__start___ex_table, __stop___ex_table - 1,
addr - exc_gp);
if (ret) return ret;
#else
/* The kernel is the last "module" -- no need to treat it special. */
struct module *mp;
for (mp = module_list; mp ; mp = mp->next) {
if (!mp->ex_table_start)
continue;
ret = search_one_table(mp->ex_table_start,
mp->ex_table_end - 1, addr - exc_gp);
if (ret) return ret;
}
#endif
/*
* The search failed with the exception gp. To be safe, try the
* old method before giving up.
*/
ret = search_exception_table_without_gp(addr);
if (ret) {
printk(KERN_ALERT, "%s: [%lx] EX_TABLE search fail with"
"exc frame GP, success with raw GP\n",
current->comm, addr);
return ret;
}
return 0;
}
arch/alpha/mm/fault.c
View file @ bdd9c8e5
......@@ -164,11 +164,13 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
no_context:
/* Are we prepared to handle this fault as an exception? */
if ((fixup = search_exception_table(regs->pc)) != 0) {
if ((fixup = search_exception_table(regs->pc, regs->gp)) != 0) {
unsigned long newpc;
newpc = fixup_exception(dpf_reg, fixup, regs->pc);
printk("%s: Exception at [<%lx>] (%lx)\n",
#if 1
printk("%s: Exception at [<%lx>] (%lx) handled successfully\n",
current->comm, regs->pc, newpc);
#endif
regs->pc = newpc;
return;
}
......
arch/alpha/mm/init.c
View file @ bdd9c8e5
......@@ -182,43 +182,15 @@ load_PCB(struct thread_struct * pcb)
return __reload_thread(pcb);
}
/*
* paging_init() sets up the page tables: in the alpha version this actually
* unmaps the bootup page table (as we're now in KSEG, so we don't need it).
*/
/* switch_to_system_map() sets up some necessary page tables. */
void
paging_init(void)
switch_to_system_map(void)
{
unsigned long newptbr;
unsigned long original_pcb_ptr;
unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0};
unsigned long dma_pfn, high_pfn;
dma_pfn = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT;
high_pfn = max_low_pfn;
#define ORDER_MASK (~((1 << (MAX_ORDER-1))-1))
#define ORDER_ALIGN(n) (((n) + ~ORDER_MASK) & ORDER_MASK)
dma_pfn = ORDER_ALIGN(dma_pfn);
high_pfn = ORDER_ALIGN(high_pfn);
#undef ORDER_MASK
#undef ORDER_ALIGN
if (dma_pfn > high_pfn)
zones_size[ZONE_DMA] = high_pfn;
else {
zones_size[ZONE_DMA] = dma_pfn;
zones_size[ZONE_NORMAL] = high_pfn - dma_pfn;
}
/* Initialize mem_map[]. */
free_area_init(zones_size);
/* Initialize the kernel's page tables. Linux puts the vptb in
the last slot of the L1 page table. */
memset((void *)ZERO_PGE, 0, PAGE_SIZE);
memset(swapper_pg_dir, 0, PAGE_SIZE);
newptbr = ((unsigned long) swapper_pg_dir - PAGE_OFFSET) >> PAGE_SHIFT;
pgd_val(swapper_pg_dir[1023]) =
......@@ -253,6 +225,41 @@ paging_init(void)
original_pcb = *(struct thread_struct *) original_pcb_ptr;
}
/*
* paging_init() sets up the memory map.
*/
void
paging_init(void)
{
unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0};
unsigned long dma_pfn, high_pfn;
dma_pfn = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT;
high_pfn = max_low_pfn;
#define ORDER_MASK (~((1L << (MAX_ORDER-1))-1))
#define ORDER_ALIGN(n) (((n) + ~ORDER_MASK) & ORDER_MASK)
dma_pfn = ORDER_ALIGN(dma_pfn);
high_pfn = ORDER_ALIGN(high_pfn);
#undef ORDER_MASK
#undef ORDER_ALIGN
if (dma_pfn > high_pfn)
zones_size[ZONE_DMA] = high_pfn;
else {
zones_size[ZONE_DMA] = dma_pfn;
zones_size[ZONE_NORMAL] = high_pfn - dma_pfn;
}
/* Initialize mem_map[]. */
free_area_init(zones_size);
/* Initialize the kernel's ZERO_PGE. */
memset((void *)ZERO_PGE, 0, PAGE_SIZE);
}
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_SRM)
void
srm_paging_stop (void)
......
arch/alpha/vmlinux.lds
View file @ bdd9c8e5
......@@ -2,7 +2,7 @@ OUTPUT_FORMAT("elf64-alpha")
ENTRY(__start)
SECTIONS
{
. = 0xfffffc0000310000;
. = 0xfffffc0000810000;
_text = .;
.text : { *(.text) }
_etext = .;
......@@ -50,9 +50,11 @@ SECTIONS
.got : { *(.got) }
.sdata : { *(.sdata) }
_edata = .;
_bss = .;
__bss_start = .;
.sbss : { *(.sbss) *(.scommon) }
.bss : { *(.bss) *(COMMON) }
__bss_stop = .;
_end = .;
.mdebug 0 : { *(.mdebug) }
......
arch/arm/Makefile
View file @ bdd9c8e5
......@@ -19,7 +19,7 @@ ARCHCC := $(word 1,$(CC))
AFLAGS += -mno-fpu
CFLAGS_PIPE := -pipe
CFLAGS := $(CFLAGS) $(CFLAGS_PIPE)
CFLAGS := $(CFLAGS) $(CFLAGS_PIPE) -msoft-float
ifdef CONFIG_FRAME_POINTER
CFLAGS := $(CFLAGS:-fomit-frame-pointer=)
......@@ -29,11 +29,13 @@ ifdef CONFIG_DEBUG_INFO
CFLAGS += -g
endif
GZFLAGS = -9
# Ensure this is ld "2.9.4" or later
NEW_LINKER := $(shell if $(LD) --gc-sections --version >/dev/null 2>&1; then echo y; else echo n; fi)
ifneq ($(NEW_LINKER),y)
dummy:; @echo '*** 2.3 kernels no longer build correctly with old versions of binutils.'
dummy:; @echo '*** ${VERSION}.${PATCHLEVEL} kernels no longer build correctly with old versions of binutils.'
@echo '*** Please upgrade your binutils to 2.9.5.'
@false
endif
......@@ -45,7 +47,7 @@ NEW_GCC := $(shell if $(CC) --version 2>&1 | grep '^2\.7' > /dev/null; then ech
# select flags depending on the compiler
#
ifeq ($(NEW_GCC),y)
CFLAGS += -mshort-load-bytes -msoft-float
CFLAGS += -mshort-load-bytes
CFLAGS_PROC_CPU_26 := -mcpu=arm3 -Os
CFLAGS_PROC_CPU_32v3 := -march=armv3
CFLAGS_PROC_CPU_32v4 := -march=armv4
......@@ -110,7 +112,7 @@ endif
LIBGCC := $(shell $(CC) $(CFLAGS) --print-libgcc-file-name)
export LIBGCC MACHINE PROCESSOR TEXTADDR
export LIBGCC MACHINE PROCESSOR TEXTADDR GZFLAGS
ifeq ($(CONFIG_ARCH_A5K),y)
MACHINE = a5k
......
arch/arm/boot/compressed/Makefile
View file @ bdd9c8e5
......@@ -89,7 +89,7 @@ $(HEAD): $(HEAD:.o=.S)
piggy.o: $(SYSTEM)
$(OBJCOPY) $(SYSTEM) piggy
gzip -9 < piggy > piggy.gz
gzip $(GZFLAGS) < piggy > piggy.gz
$(LD) -r -o $@ -b binary piggy.gz
rm -f piggy piggy.gz
......
arch/arm/boot/compressed/head-sa1100.S
View file @ bdd9c8e5
......@@ -133,6 +133,5 @@ UART1_BASE: .long 0x80010000
#endif
@ Restore initial r0/r1
@ (r8 preserved)
mov r0, r8
mov r1, r9
arch/arm/boot/compressed/head.S
View file @ bdd9c8e5
......@@ -84,9 +84,7 @@ start:
b 1f
.word 0x016f2818 @ Magic numbers to help the loader
.word start
1: adr r8, start @ get the start address of the code
@ (used for locating the page tables)
1:
/*
* some architecture specific code can be inserted
* by the linker here, but it should preserve r0, r1
......@@ -178,9 +176,13 @@ LC0: .word __bss_start
.align 5
cache_on: ldr r1, proc_sa110_type
eor r1, r1, r6
movs r1, r1, lsr #5
movs r1, r1, lsr #5 @ catch SA110 and SA1100
beq 1f
ldr r1, proc_sa1110_type
eor r1, r1, r6
movs r1, r1, lsr #4
movne pc, lr
1:
sub r3, r4, #16384 @ Page directory size
bic r3, r3, #0xff @ Align the pointer
bic r3, r3, #0x3f
......@@ -259,6 +261,11 @@ proc_sa110_type:
.word 0x4401a100
.size proc_sa110_type, . - proc_sa110_type
.type proc_sa1110_type,#object
proc_sa1110_type:
.word 0x6901b110
.size proc_sa1110_type, . - proc_sa1110_type
/*
* Turn off StrongARM cache and MMU. It is safe to
* leave the I-cache on.
......@@ -273,8 +280,13 @@ proc_sa110_type:
.align 5
cache_off: ldr r1, proc_sa110_type
eor r1, r1, r6
movs r1, r1, lsr #5
movs r1, r1, lsr #5 @ catch SA110 and SA1100
beq 1f
ldr r1, proc_sa1110_type
eor r1, r1, r6
movs r1, r1, lsr #4
movne pc, lr
1:
mrc p15, 0, r0, c1, c0
bic r0, r0, #0x000d
mcr p15, 0, r0, c1, c0
......@@ -292,11 +304,15 @@ cache_off: ldr r1, proc_sa110_type
*/
.align 5
cache_clean_flush:
ldr r1, proc_sa110_type @ SA-110 or SA-1100?
ldr r1, proc_sa110_type
eor r1, r1, r6
movs r1, r1, lsr #5 @ catch SA110 and SA1100
beq 1f
ldr r1, proc_sa1110_type
eor r1, r1, r6
movs r1, r1, lsr #5
movs r1, r1, lsr #4
movne pc, lr
1:
bic r1, pc, #31
add r2, r1, #32768
1: ldr r12, [r1], #32 @ s/w flush D cache
......
arch/arm/config.in
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arch/arm/def-configs/a5k
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......@@ -94,10 +94,6 @@ CONFIG_BLK_DEV_IDE_ICSIDE=y
# CONFIG_BLK_DEV_IDEDMA_ICS is not set
# CONFIG_BLK_DEV_IDE_RAPIDE is not set
# CONFIG_IDE_CHIPSETS is not set
#
# Additional Block Devices
#
CONFIG_BLK_DEV_LOOP=m
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_MD is not set
......
arch/arm/def-configs/assabet
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......@@ -95,10 +95,6 @@ CONFIG_LEDS_CPU=y
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
#
# Additional Block Devices
#
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_LVM is not set
......@@ -216,10 +212,12 @@ CONFIG_FONT_8x8=y
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_RAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_MINIX_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
......@@ -227,11 +225,16 @@ CONFIG_PROC_FS=y
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_SYSV_FS_WRITE is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set
# CONFIG_NCPFS_NLS is not set
#
# Partition Types
......
arch/arm/def-configs/ebsa110
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......@@ -138,10 +138,6 @@ CONFIG_PARIDE_ON20=m
CONFIG_PARIDE_ON26=m
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
#
# Additional Block Devices
#
CONFIG_BLK_DEV_LOOP=m
CONFIG_BLK_DEV_NBD=m
# CONFIG_BLK_DEV_LVM is not set
......
arch/arm/def-configs/graphicsclient
View file @ bdd9c8e5
......@@ -84,10 +84,6 @@ CONFIG_CMDLINE="ip=off"
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_HD_ONLY is not set
#
# Additional Block Devices
#
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_MD is not set
......
arch/arm/def-configs/lart
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......@@ -79,10 +79,6 @@ CONFIG_BINFMT_ELF=y
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
#
# Additional Block Devices
#
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_LVM is not set
......
arch/arm/def-configs/rpc
View file @ bdd9c8e5
......@@ -91,10 +91,6 @@ CONFIG_BLK_DEV_FD=y
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
#
# Additional Block Devices
#
CONFIG_BLK_DEV_LOOP=m
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_LVM is not set
......
arch/arm/def-configs/thinclient
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......@@ -80,10 +80,6 @@ CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_IDESCSI is not set
# CONFIG_BLK_DEV_CMD640 is not set
# CONFIG_IDE_CHIPSETS is not set
#
# Additional Block Devices
#
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_BLK_DEV_RAM is not set
......
arch/arm/defconfig
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