Commit be6bfb29 authored by Ricardo Neri's avatar Ricardo Neri Committed by Rafael J. Wysocki

thermal: intel: intel_tcc_cooling: Use a model-specific bitmask for TCC offset

The TCC offset field in the register MSR_TEMPERATURE_TARGET is not
architectural. The TCC library provides a model-specific bitmask. Use it to
determine the maximum TCC offset.
Suggested-by: default avatarZhang Rui <rui.zhang@intel.com>
Reviewed-by: default avatarZhang Rui <rui.zhang@intel.com>
Signed-off-by: default avatarRicardo Neri <ricardo.neri-calderon@linux.intel.com>
Link: https://patch.msgid.link/20240614211606.5896-3-ricardo.neri-calderon@linux.intel.comSigned-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent 6ae0092c
...@@ -20,7 +20,7 @@ static struct thermal_cooling_device *tcc_cdev; ...@@ -20,7 +20,7 @@ static struct thermal_cooling_device *tcc_cdev;
static int tcc_get_max_state(struct thermal_cooling_device *cdev, unsigned long static int tcc_get_max_state(struct thermal_cooling_device *cdev, unsigned long
*state) *state)
{ {
*state = 0x3f; *state = intel_tcc_get_offset_mask();
return 0; return 0;
} }
......
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