Commit bed1f7d1 authored by Olof Johansson's avatar Olof Johansson

Merge tag 'uniphier-dt-v4.16' of...

Merge tag 'uniphier-dt-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt

UniPhier ARM SoC DT updates for v4.16

- clean up gpios properties by macro
- add efuse nodes
- add has-transaction-translator property to generic-ehci nodes

* tag 'uniphier-dt-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
  ARM: dts: uniphier: add has-transaction-translator property to usb node for LD4, sLD8 and Pro4
  ARM: dts: uniphier: add efuse node for UniPhier 32bit SoC
  ARM: dts: uniphier: use macros in dt-bindings header
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 2943d853 6fa9b025
...@@ -56,7 +56,7 @@ &serial3 { ...@@ -56,7 +56,7 @@ &serial3 {
&gpio { &gpio {
xirq1 { xirq1 {
gpio-hog; gpio-hog;
gpios = <121 0>; gpios = <UNIPHIER_GPIO_IRQ(1) 0>;
input; input;
}; };
}; };
......
...@@ -7,6 +7,8 @@ ...@@ -7,6 +7,8 @@
* SPDX-License-Identifier: (GPL-2.0+ OR MIT) * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/ */
#include <dt-bindings/gpio/uniphier-gpio.h>
/ { / {
compatible = "socionext,uniphier-ld4"; compatible = "socionext,uniphier-ld4";
#address-cells = <1>; #address-cells = <1>;
...@@ -235,6 +237,7 @@ usb0: usb@5a800100 { ...@@ -235,6 +237,7 @@ usb0: usb@5a800100 {
<&mio_clk 12>; <&mio_clk 12>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
<&mio_rst 12>; <&mio_rst 12>;
has-transaction-translator;
}; };
usb1: usb@5a810100 { usb1: usb@5a810100 {
...@@ -248,6 +251,7 @@ usb1: usb@5a810100 { ...@@ -248,6 +251,7 @@ usb1: usb@5a810100 {
<&mio_clk 13>; <&mio_clk 13>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
<&mio_rst 13>; <&mio_rst 13>;
has-transaction-translator;
}; };
usb2: usb@5a820100 { usb2: usb@5a820100 {
...@@ -261,6 +265,7 @@ usb2: usb@5a820100 { ...@@ -261,6 +265,7 @@ usb2: usb@5a820100 {
<&mio_clk 14>; <&mio_clk 14>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>, resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
<&mio_rst 14>; <&mio_rst 14>;
has-transaction-translator;
}; };
soc-glue@5f800000 { soc-glue@5f800000 {
...@@ -273,6 +278,24 @@ pinctrl: pinctrl { ...@@ -273,6 +278,24 @@ pinctrl: pinctrl {
}; };
}; };
soc-glue@5f900000 {
compatible = "socionext,uniphier-ld4-soc-glue-debug",
"simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x5f900000 0x2000>;
efuse@100 {
compatible = "socionext,uniphier-efuse";
reg = <0x100 0x28>;
};
efuse@130 {
compatible = "socionext,uniphier-efuse";
reg = <0x130 0x8>;
};
};
timer@60000200 { timer@60000200 {
compatible = "arm,cortex-a9-global-timer"; compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>; reg = <0x60000200 0x20>;
......
...@@ -58,7 +58,7 @@ &serial2 { ...@@ -58,7 +58,7 @@ &serial2 {
&gpio { &gpio {
xirq4 { xirq4 {
gpio-hog; gpio-hog;
gpios = <124 0>; gpios = <UNIPHIER_GPIO_IRQ(4) 0>;
input; input;
}; };
}; };
......
...@@ -58,7 +58,7 @@ &serial2 { ...@@ -58,7 +58,7 @@ &serial2 {
&gpio { &gpio {
xirq2 { xirq2 {
gpio-hog; gpio-hog;
gpios = <122 0>; gpios = <UNIPHIER_GPIO_IRQ(2) 0>;
input; input;
}; };
}; };
......
...@@ -7,6 +7,8 @@ ...@@ -7,6 +7,8 @@
* SPDX-License-Identifier: (GPL-2.0+ OR MIT) * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/ */
#include <dt-bindings/gpio/uniphier-gpio.h>
/ { / {
compatible = "socionext,uniphier-pro4"; compatible = "socionext,uniphier-pro4";
#address-cells = <1>; #address-cells = <1>;
...@@ -269,6 +271,7 @@ usb2: usb@5a800100 { ...@@ -269,6 +271,7 @@ usb2: usb@5a800100 {
<&mio_clk 12>; <&mio_clk 12>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
<&mio_rst 12>; <&mio_rst 12>;
has-transaction-translator;
}; };
usb3: usb@5a810100 { usb3: usb@5a810100 {
...@@ -282,6 +285,7 @@ usb3: usb@5a810100 { ...@@ -282,6 +285,7 @@ usb3: usb@5a810100 {
<&mio_clk 13>; <&mio_clk 13>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
<&mio_rst 13>; <&mio_rst 13>;
has-transaction-translator;
}; };
soc-glue@5f800000 { soc-glue@5f800000 {
...@@ -294,6 +298,29 @@ pinctrl: pinctrl { ...@@ -294,6 +298,29 @@ pinctrl: pinctrl {
}; };
}; };
soc-glue@5f900000 {
compatible = "socionext,uniphier-pro4-soc-glue-debug",
"simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x5f900000 0x2000>;
efuse@100 {
compatible = "socionext,uniphier-efuse";
reg = <0x100 0x28>;
};
efuse@130 {
compatible = "socionext,uniphier-efuse";
reg = <0x130 0x8>;
};
efuse@200 {
compatible = "socionext,uniphier-efuse";
reg = <0x200 0x14>;
};
};
aidet: aidet@5fc20000 { aidet: aidet@5fc20000 {
compatible = "socionext,uniphier-pro4-aidet"; compatible = "socionext,uniphier-pro4-aidet";
reg = <0x5fc20000 0x200>; reg = <0x5fc20000 0x200>;
......
...@@ -355,6 +355,39 @@ pinctrl: pinctrl { ...@@ -355,6 +355,39 @@ pinctrl: pinctrl {
}; };
}; };
soc-glue@5f900000 {
compatible = "socionext,uniphier-pro5-soc-glue-debug",
"simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x5f900000 0x2000>;
efuse@100 {
compatible = "socionext,uniphier-efuse";
reg = <0x100 0x28>;
};
efuse@130 {
compatible = "socionext,uniphier-efuse";
reg = <0x130 0x8>;
};
efuse@200 {
compatible = "socionext,uniphier-efuse";
reg = <0x200 0x28>;
};
efuse@300 {
compatible = "socionext,uniphier-efuse";
reg = <0x300 0x14>;
};
efuse@400 {
compatible = "socionext,uniphier-efuse";
reg = <0x400 0x8>;
};
};
aidet: aidet@5fc20000 { aidet: aidet@5fc20000 {
compatible = "socionext,uniphier-pro5-aidet"; compatible = "socionext,uniphier-pro5-aidet";
reg = <0x5fc20000 0x200>; reg = <0x5fc20000 0x200>;
......
...@@ -7,6 +7,7 @@ ...@@ -7,6 +7,7 @@
* SPDX-License-Identifier: (GPL-2.0+ OR MIT) * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/ */
#include <dt-bindings/gpio/uniphier-gpio.h>
#include <dt-bindings/thermal/thermal.h> #include <dt-bindings/thermal/thermal.h>
/ { / {
...@@ -375,6 +376,24 @@ pinctrl: pinctrl { ...@@ -375,6 +376,24 @@ pinctrl: pinctrl {
}; };
}; };
soc-glue@5f900000 {
compatible = "socionext,uniphier-pxs2-soc-glue-debug",
"simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x5f900000 0x2000>;
efuse@100 {
compatible = "socionext,uniphier-efuse";
reg = <0x100 0x28>;
};
efuse@200 {
compatible = "socionext,uniphier-efuse";
reg = <0x200 0x58>;
};
};
aidet: aidet@5fc20000 { aidet: aidet@5fc20000 {
compatible = "socionext,uniphier-pxs2-aidet"; compatible = "socionext,uniphier-pxs2-aidet";
reg = <0x5fc20000 0x200>; reg = <0x5fc20000 0x200>;
......
...@@ -56,7 +56,7 @@ &serial3 { ...@@ -56,7 +56,7 @@ &serial3 {
&gpio { &gpio {
xirq0 { xirq0 {
gpio-hog; gpio-hog;
gpios = <120 0>; gpios = <UNIPHIER_GPIO_IRQ(0) 0>;
input; input;
}; };
}; };
......
...@@ -7,6 +7,8 @@ ...@@ -7,6 +7,8 @@
* SPDX-License-Identifier: (GPL-2.0+ OR MIT) * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/ */
#include <dt-bindings/gpio/uniphier-gpio.h>
/ { / {
compatible = "socionext,uniphier-sld8"; compatible = "socionext,uniphier-sld8";
#address-cells = <1>; #address-cells = <1>;
...@@ -239,6 +241,7 @@ usb0: usb@5a800100 { ...@@ -239,6 +241,7 @@ usb0: usb@5a800100 {
<&mio_clk 12>; <&mio_clk 12>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
<&mio_rst 12>; <&mio_rst 12>;
has-transaction-translator;
}; };
usb1: usb@5a810100 { usb1: usb@5a810100 {
...@@ -252,6 +255,7 @@ usb1: usb@5a810100 { ...@@ -252,6 +255,7 @@ usb1: usb@5a810100 {
<&mio_clk 13>; <&mio_clk 13>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
<&mio_rst 13>; <&mio_rst 13>;
has-transaction-translator;
}; };
usb2: usb@5a820100 { usb2: usb@5a820100 {
...@@ -265,6 +269,7 @@ usb2: usb@5a820100 { ...@@ -265,6 +269,7 @@ usb2: usb@5a820100 {
<&mio_clk 14>; <&mio_clk 14>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>, resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
<&mio_rst 14>; <&mio_rst 14>;
has-transaction-translator;
}; };
soc-glue@5f800000 { soc-glue@5f800000 {
...@@ -277,6 +282,24 @@ pinctrl: pinctrl { ...@@ -277,6 +282,24 @@ pinctrl: pinctrl {
}; };
}; };
soc-glue@5f900000 {
compatible = "socionext,uniphier-sld8-soc-glue-debug",
"simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x5f900000 0x2000>;
efuse@100 {
compatible = "socionext,uniphier-efuse";
reg = <0x100 0x28>;
};
efuse@200 {
compatible = "socionext,uniphier-efuse";
reg = <0x200 0x14>;
};
};
timer@60000200 { timer@60000200 {
compatible = "arm,cortex-a9-global-timer"; compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>; reg = <0x60000200 0x20>;
......
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