Commit bf0b0eee authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'aspeed-5.4-arch' of...

Merge tag 'aspeed-5.4-arch' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/soc

ASPEED architecture updates for 5.4

This adds support for the new ASPEED AST2600 BMC SoC.

* tag 'aspeed-5.4-arch' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
  ARM: aspeed: Enable SMP boot
  ARM: aspeed: Add ASPEED AST2600 architecture
  ARM: aspeed: Select timer in each SoC
  dt-bindings: arm: cpus: Add ASPEED SMP

Link: https://lore.kernel.org/r/CACPK8Xc1aSp5fXL3cEzC9SJsCXG2JwsSPpQrW3a09dkvhCyHHA@mail.gmail.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 98d86841 87dfe496
...@@ -175,6 +175,7 @@ properties: ...@@ -175,6 +175,7 @@ properties:
- amlogic,meson8-smp - amlogic,meson8-smp
- amlogic,meson8b-smp - amlogic,meson8b-smp
- arm,realview-smp - arm,realview-smp
- aspeed,ast2600-smp
- brcm,bcm11351-cpu-method - brcm,bcm11351-cpu-method
- brcm,bcm23550 - brcm,bcm23550
- brcm,bcm2836-smp - brcm,bcm2836-smp
......
...@@ -155,6 +155,7 @@ textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000 ...@@ -155,6 +155,7 @@ textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000
machine-$(CONFIG_ARCH_ACTIONS) += actions machine-$(CONFIG_ARCH_ACTIONS) += actions
machine-$(CONFIG_ARCH_ALPINE) += alpine machine-$(CONFIG_ARCH_ALPINE) += alpine
machine-$(CONFIG_ARCH_ARTPEC) += artpec machine-$(CONFIG_ARCH_ARTPEC) += artpec
machine-$(CONFIG_ARCH_ASPEED) += aspeed
machine-$(CONFIG_ARCH_AT91) += at91 machine-$(CONFIG_ARCH_AT91) += at91
machine-$(CONFIG_ARCH_AXXIA) += axxia machine-$(CONFIG_ARCH_AXXIA) += axxia
machine-$(CONFIG_ARCH_BCM) += bcm machine-$(CONFIG_ARCH_BCM) += bcm
......
# SPDX-License-Identifier: GPL-2.0-only # SPDX-License-Identifier: GPL-2.0-only
menuconfig ARCH_ASPEED menuconfig ARCH_ASPEED
bool "Aspeed BMC architectures" bool "Aspeed BMC architectures"
depends on ARCH_MULTI_V5 || ARCH_MULTI_V6 depends on ARCH_MULTI_V5 || ARCH_MULTI_V6 || ARCH_MULTI_V7
select SRAM select SRAM
select WATCHDOG select WATCHDOG
select ASPEED_WATCHDOG select ASPEED_WATCHDOG
select FTTMR010_TIMER
select MFD_SYSCON select MFD_SYSCON
select PINCTRL select PINCTRL
help help
...@@ -18,6 +17,7 @@ config MACH_ASPEED_G4 ...@@ -18,6 +17,7 @@ config MACH_ASPEED_G4
depends on ARCH_MULTI_V5 depends on ARCH_MULTI_V5
select CPU_ARM926T select CPU_ARM926T
select PINCTRL_ASPEED_G4 select PINCTRL_ASPEED_G4
select FTTMR010_TIMER
help help
Say yes if you intend to run on an Aspeed ast2400 or similar Say yes if you intend to run on an Aspeed ast2400 or similar
fourth generation BMCs, such as those used by OpenPower Power8 fourth generation BMCs, such as those used by OpenPower Power8
...@@ -28,8 +28,21 @@ config MACH_ASPEED_G5 ...@@ -28,8 +28,21 @@ config MACH_ASPEED_G5
depends on ARCH_MULTI_V6 depends on ARCH_MULTI_V6
select CPU_V6 select CPU_V6
select PINCTRL_ASPEED_G5 select PINCTRL_ASPEED_G5
select FTTMR010_TIMER
help help
Say yes if you intend to run on an Aspeed ast2500 or similar Say yes if you intend to run on an Aspeed ast2500 or similar
fifth generation Aspeed BMCs. fifth generation Aspeed BMCs.
config MACH_ASPEED_G6
bool "Aspeed SoC 6th Generation"
depends on ARCH_MULTI_V7
select CPU_V7
select PINCTRL_ASPEED_G6
select ARM_GIC
select HAVE_ARM_ARCH_TIMER
select HAVE_SMP
help
Say yes if you intend to run on an Aspeed ast2600 or similar
sixth generation Aspeed BMCs.
endif endif
# SPDX-License-Identifier: GPL-2.0-or-later
# Copyright (C) ASPEED Technology Inc.
# Copyright IBM Corp.
obj-$(CONFIG_SMP) += platsmp.o
// SPDX-License-Identifier: GPL-2.0-or-later
// Copyright (C) ASPEED Technology Inc.
// Copyright IBM Corp.
#include <linux/of_address.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/smp.h>
#define BOOT_ADDR 0x00
#define BOOT_SIG 0x04
static struct device_node *secboot_node;
static int aspeed_g6_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
void __iomem *base;
base = of_iomap(secboot_node, 0);
if (!base) {
pr_err("could not map the secondary boot base!");
return -ENODEV;
}
writel_relaxed(0, base + BOOT_ADDR);
writel_relaxed(__pa_symbol(secondary_startup_arm), base + BOOT_ADDR);
writel_relaxed((0xABBAAB00 | (cpu & 0xff)), base + BOOT_SIG);
dsb_sev();
iounmap(base);
return 0;
}
static void __init aspeed_g6_smp_prepare_cpus(unsigned int max_cpus)
{
void __iomem *base;
secboot_node = of_find_compatible_node(NULL, NULL, "aspeed,ast2600-smpmem");
if (!secboot_node) {
pr_err("secboot device node found!!\n");
return;
}
base = of_iomap(secboot_node, 0);
if (!base) {
pr_err("could not map the secondary boot base!");
return;
}
__raw_writel(0xBADABABA, base + BOOT_SIG);
iounmap(base);
}
static const struct smp_operations aspeed_smp_ops __initconst = {
.smp_prepare_cpus = aspeed_g6_smp_prepare_cpus,
.smp_boot_secondary = aspeed_g6_boot_secondary,
};
CPU_METHOD_OF_DECLARE(aspeed_smp, "aspeed,ast2600-smp", &aspeed_smp_ops);
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