Commit bf225f20 authored by Chris Wilson's avatar Chris Wilson Committed by Daniel Vetter

drm/i915: Move RPS evaluation interval counters to i915->rps

Place the RPS counters inside the RPS struct.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 755f68f4
...@@ -902,10 +902,10 @@ struct vlv_s0ix_state { ...@@ -902,10 +902,10 @@ struct vlv_s0ix_state {
u32 clock_gate_dis2; u32 clock_gate_dis2;
}; };
struct intel_rps_ei_calc { struct intel_rps_ei {
u32 cz_ts_ei; u32 cz_clock;
u32 render_ei_c0; u32 render_c0;
u32 media_ei_c0; u32 media_c0;
}; };
struct intel_gen6_power_mgmt { struct intel_gen6_power_mgmt {
...@@ -940,6 +940,9 @@ struct intel_gen6_power_mgmt { ...@@ -940,6 +940,9 @@ struct intel_gen6_power_mgmt {
bool enabled; bool enabled;
struct delayed_work delayed_resume_work; struct delayed_work delayed_resume_work;
/* manual wa residency calculations */
struct intel_rps_ei up_ei, down_ei;
/* /*
* Protects RPS/RC6 register access and PCU communication. * Protects RPS/RC6 register access and PCU communication.
* Must be taken after struct_mutex if nested. * Must be taken after struct_mutex if nested.
...@@ -1534,13 +1537,6 @@ struct drm_i915_private { ...@@ -1534,13 +1537,6 @@ struct drm_i915_private {
/* gen6+ rps state */ /* gen6+ rps state */
struct intel_gen6_power_mgmt rps; struct intel_gen6_power_mgmt rps;
/* rps wa up ei calculation */
struct intel_rps_ei_calc rps_up_ei;
/* rps wa down ei calculation */
struct intel_rps_ei_calc rps_down_ei;
/* ilk-only ips/rps state. Everything in here is protected by the global /* ilk-only ips/rps state. Everything in here is protected by the global
* mchdev_lock in intel_pm.c */ * mchdev_lock in intel_pm.c */
struct intel_ilk_power_mgmt ips; struct intel_ilk_power_mgmt ips;
......
...@@ -1273,7 +1273,7 @@ static void notify_ring(struct drm_device *dev, ...@@ -1273,7 +1273,7 @@ static void notify_ring(struct drm_device *dev,
} }
static u32 vlv_c0_residency(struct drm_i915_private *dev_priv, static u32 vlv_c0_residency(struct drm_i915_private *dev_priv,
struct intel_rps_ei_calc *rps_ei) struct intel_rps_ei *rps_ei)
{ {
u32 cz_ts, cz_freq_khz; u32 cz_ts, cz_freq_khz;
u32 render_count, media_count; u32 render_count, media_count;
...@@ -1286,22 +1286,22 @@ static u32 vlv_c0_residency(struct drm_i915_private *dev_priv, ...@@ -1286,22 +1286,22 @@ static u32 vlv_c0_residency(struct drm_i915_private *dev_priv,
render_count = I915_READ(VLV_RENDER_C0_COUNT_REG); render_count = I915_READ(VLV_RENDER_C0_COUNT_REG);
media_count = I915_READ(VLV_MEDIA_C0_COUNT_REG); media_count = I915_READ(VLV_MEDIA_C0_COUNT_REG);
if (rps_ei->cz_ts_ei == 0) { if (rps_ei->cz_clock == 0) {
rps_ei->cz_ts_ei = cz_ts; rps_ei->cz_clock = cz_ts;
rps_ei->render_ei_c0 = render_count; rps_ei->render_c0 = render_count;
rps_ei->media_ei_c0 = media_count; rps_ei->media_c0 = media_count;
return dev_priv->rps.cur_freq; return dev_priv->rps.cur_freq;
} }
elapsed_time = cz_ts - rps_ei->cz_ts_ei; elapsed_time = cz_ts - rps_ei->cz_clock;
rps_ei->cz_ts_ei = cz_ts; rps_ei->cz_clock = cz_ts;
elapsed_render = render_count - rps_ei->render_ei_c0; elapsed_render = render_count - rps_ei->render_c0;
rps_ei->render_ei_c0 = render_count; rps_ei->render_c0 = render_count;
elapsed_media = media_count - rps_ei->media_ei_c0; elapsed_media = media_count - rps_ei->media_c0;
rps_ei->media_ei_c0 = media_count; rps_ei->media_c0 = media_count;
/* Convert all the counters into common unit of milli sec */ /* Convert all the counters into common unit of milli sec */
elapsed_time /= VLV_CZ_CLOCK_TO_MILLI_SEC; elapsed_time /= VLV_CZ_CLOCK_TO_MILLI_SEC;
...@@ -1337,9 +1337,9 @@ static u32 vlv_calc_delay_from_C0_counters(struct drm_i915_private *dev_priv) ...@@ -1337,9 +1337,9 @@ static u32 vlv_calc_delay_from_C0_counters(struct drm_i915_private *dev_priv)
WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock)); WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
if (dev_priv->rps_up_ei.cz_ts_ei == 0) { if (dev_priv->rps.up_ei.cz_clock == 0) {
vlv_c0_residency(dev_priv, &dev_priv->rps_up_ei); vlv_c0_residency(dev_priv, &dev_priv->rps.up_ei);
vlv_c0_residency(dev_priv, &dev_priv->rps_down_ei); vlv_c0_residency(dev_priv, &dev_priv->rps.down_ei);
return dev_priv->rps.cur_freq; return dev_priv->rps.cur_freq;
} }
...@@ -1354,10 +1354,10 @@ static u32 vlv_calc_delay_from_C0_counters(struct drm_i915_private *dev_priv) ...@@ -1354,10 +1354,10 @@ static u32 vlv_calc_delay_from_C0_counters(struct drm_i915_private *dev_priv)
dev_priv->rps.ei_interrupt_count = 0; dev_priv->rps.ei_interrupt_count = 0;
residency_C0_down = vlv_c0_residency(dev_priv, residency_C0_down = vlv_c0_residency(dev_priv,
&dev_priv->rps_down_ei); &dev_priv->rps.down_ei);
} else { } else {
residency_C0_up = vlv_c0_residency(dev_priv, residency_C0_up = vlv_c0_residency(dev_priv,
&dev_priv->rps_up_ei); &dev_priv->rps.up_ei);
} }
new_delay = dev_priv->rps.cur_freq; new_delay = dev_priv->rps.cur_freq;
......
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