Commit bf5393c5 authored by Jagan Teki's avatar Jagan Teki Committed by Shawn Guo

ARM: dts: imx6qdl: Fix "ERROR: code indent should use tabs where possible"

Fixed code indent tabs in respetcive imx6qdl dtsi files.
Signed-off-by: default avatarJagan Teki <jteki@openedev.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 05c183e4
......@@ -153,9 +153,9 @@ &can1 {
&clks {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};
&ecspi3 {
......
......@@ -154,9 +154,9 @@ &can1 {
&clks {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};
&fec {
......
......@@ -144,9 +144,9 @@ &can1 {
&clks {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};
&fec {
......
......@@ -291,7 +291,7 @@ pinctrl_uart5: uart5grp {
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
>;
};
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
......
......@@ -427,10 +427,10 @@ &usdhc2 {
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3
&pinctrl_usdhc3_cdwp>;
cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
status = "disabled";
status = "disabled";
};
......@@ -283,7 +283,7 @@ codec: cs42888@48 {
VD-supply = <&reg_audio>;
VLS-supply = <&reg_audio>;
VLC-supply = <&reg_audio>;
};
};
};
......
......@@ -129,8 +129,8 @@ leds {
pinctrl-0 = <&pinctrl_gpio_leds>;
red {
gpios = <&gpio1 2 0>;
default-state = "on";
gpios = <&gpio1 2 0>;
default-state = "on";
};
};
......
......@@ -204,9 +204,9 @@ pcie: pcie@0x01000000 {
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
<0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_PCIE_AXI>,
<&clks IMX6QDL_CLK_LVDS1_GATE>,
<&clks IMX6QDL_CLK_PCIE_REF_125M>;
......
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