drm/nouveau/disp/nv50-: fetch mask of available dacs during oneinit

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/nvkm/engine/disp/dacgf119.c

@@ -58,8 +58,13 @@ gf119_dac = {
 int
 gf119_dac_new(struct nvkm_disp *disp, int id)
 {
-	struct nvkm_device *device = disp->engine.subdev.device;
-	if (!(nvkm_rd32(device, 0x612004) & (0x00000010 << id)))
-		return 0;
 	return nvkm_ior_new_(&gf119_dac, disp, DAC, id);
 }
+
+int
+gf119_dac_cnt(struct nvkm_disp *disp, unsigned long *pmask)
+{
+	struct nvkm_device *device = disp->engine.subdev.device;
+	*pmask = (nvkm_rd32(device, 0x612004) & 0x000000f0) >> 4;
+	return 4;
+}

drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c

@@ -109,8 +109,13 @@ nv50_dac = {
 int
 nv50_dac_new(struct nvkm_disp *disp, int id)
 {
-	struct nvkm_device *device = disp->engine.subdev.device;
-	if (!(nvkm_rd32(device, 0x610184) & (0x00100000 << id)))
-		return 0;
 	return nvkm_ior_new_(&nv50_dac, disp, DAC, id);
 }
+
+int
+nv50_dac_cnt(struct nvkm_disp *disp, unsigned long *pmask)
+{
+	struct nvkm_device *device = disp->engine.subdev.device;
+	*pmask = (nvkm_rd32(device, 0x610184) & 0x00700000) >> 20;
+	return 3;
+}

drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.c

@@ -33,7 +33,7 @@ g84_disp = {
 	.super = nv50_disp_super,
 	.root = &g84_disp_root_oclass,
 	.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
-	.dac = { .nr = 3, .new = nv50_dac_new },
+	.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
 	.sor = { .nr = 2, .new = g84_sor_new },
 	.pior = { .nr = 3, .new = nv50_pior_new },
 };

drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c

@@ -33,7 +33,7 @@ g94_disp = {
 	.super = nv50_disp_super,
 	.root = &g94_disp_root_oclass,
 	.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
-	.dac = { .nr = 3, .new = nv50_dac_new },
+	.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
 	.sor = { .nr = 4, .new = g94_sor_new },
 	.pior = { .nr = 3, .new = nv50_pior_new },
 };

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

@@ -172,7 +172,7 @@ gf119_disp = {
 	.super = gf119_disp_super,
 	.root = &gf119_disp_root_oclass,
 	.head = { .cnt = gf119_head_cnt, .new = gf119_head_new },
-	.dac = { .nr = 3, .new = gf119_dac_new },
+	.dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new },
 	.sor = { .nr = 4, .new = gf119_sor_new },
 };
 

drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c

@@ -34,7 +34,7 @@ gk104_disp = {
 	.super = gf119_disp_super,
 	.root = &gk104_disp_root_oclass,
 	.head = { .cnt = gf119_head_cnt, .new = gf119_head_new },
-	.dac = { .nr = 3, .new = gf119_dac_new },
+	.dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new },
 	.sor = { .nr = 4, .new = gk104_sor_new },
 };
 

drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.c

@@ -34,7 +34,7 @@ gk110_disp = {
 	.super = gf119_disp_super,
 	.root = &gk110_disp_root_oclass,
 	.head = { .cnt = gf119_head_cnt, .new = gf119_head_new },
-	.dac = { .nr = 3, .new = gf119_dac_new },
+	.dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new },
 	.sor = { .nr = 4, .new = gk104_sor_new },
 };
 

drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c

@@ -34,7 +34,7 @@ gm107_disp = {
 	.super = gf119_disp_super,
 	.root = &gm107_disp_root_oclass,
 	.head = { .cnt = gf119_head_cnt, .new = gf119_head_new },
-	.dac = { .nr = 3, .new = gf119_dac_new },
+	.dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new },
 	.sor = { .nr = 4, .new = gm107_sor_new },
 };
 

drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c

@@ -34,7 +34,7 @@ gm200_disp = {
 	.super = gf119_disp_super,
 	.root = &gm200_disp_root_oclass,
 	.head = { .cnt = gf119_head_cnt, .new = gf119_head_new },
-	.dac = { .nr = 3, .new = gf119_dac_new },
+	.dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new },
 	.sor = { .nr = 4, .new = gm200_sor_new },
 };
 

drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.c

@@ -33,7 +33,7 @@ gt200_disp = {
 	.super = nv50_disp_super,
 	.root = &gt200_disp_root_oclass,
 	.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
-	.dac = { .nr = 3, .new = nv50_dac_new },
+	.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
 	.sor = { .nr = 2, .new = g84_sor_new },
 	.pior = { .nr = 3, .new = nv50_pior_new },
 };

drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c

@@ -33,7 +33,7 @@ gt215_disp = {
 	.super = nv50_disp_super,
 	.root = &gt215_disp_root_oclass,
 	.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
-	.dac = { .nr = 3, .new = nv50_dac_new },
+	.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
 	.sor = { .nr = 4, .new = gt215_sor_new },
 	.pior = { .nr = 3, .new = nv50_pior_new },
 };

drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h

@@ -153,7 +153,10 @@ void gf119_hda_eld(struct nvkm_ior *, u8 *, u8);
 #define IOR_WARN(i,f,a...) IOR_MSG((i), warn, f, ##a)
 #define IOR_DBG(i,f,a...) IOR_MSG((i), debug, f, ##a)
 
+int nv50_dac_cnt(struct nvkm_disp *, unsigned long *);
 int nv50_dac_new(struct nvkm_disp *, int);
+
+int gf119_dac_cnt(struct nvkm_disp *, unsigned long *);
 int gf119_dac_new(struct nvkm_disp *, int);
 
 int nv50_pior_new(struct nvkm_disp *, int);

drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c

@@ -31,7 +31,7 @@ mcp77_disp = {
 	.super = nv50_disp_super,
 	.root = &g94_disp_root_oclass,
 	.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
-	.dac = { .nr = 3, .new = nv50_dac_new },
+	.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
 	.sor = { .nr = 4, .new = mcp77_sor_new },
 	.pior = { .nr = 3, .new = nv50_pior_new },
 };

drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c

@@ -31,7 +31,7 @@ mcp89_disp = {
 	.super = nv50_disp_super,
 	.root = &gt215_disp_root_oclass,
 	.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
-	.dac = { .nr = 3, .new = nv50_dac_new },
+	.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
 	.sor = { .nr = 4, .new = mcp89_sor_new },
 	.pior = { .nr = 3, .new = nv50_pior_new },
 };

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

@@ -76,10 +76,15 @@ nv50_disp_oneinit_(struct nvkm_disp *base)
 			return ret;
 	}
 
-	for (i = 0; func->dac.new && i < func->dac.nr; i++) {
-		ret = func->dac.new(&disp->base, i);
-		if (ret)
-			return ret;
+	if (func->dac.cnt) {
+		disp->dac.nr = func->dac.cnt(&disp->base, &disp->dac.mask);
+		nvkm_debug(subdev, "   DAC(s): %d (%02lx)\n",
+			   disp->dac.nr, disp->dac.mask);
+		for_each_set_bit(i, &disp->dac.mask, disp->dac.nr) {
+			ret = func->dac.new(&disp->base, i);
+			if (ret)
+				return ret;
+		}
 	}
 
 	for (i = 0; func->pior.new && i < func->pior.nr; i++) {
@@ -637,7 +642,7 @@ nv50_disp = {
 	.super = nv50_disp_super,
 	.root = &nv50_disp_root_oclass,
 	.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
-	.dac = { .nr = 3, .new = nv50_dac_new },
+	.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
 	.sor = { .nr = 2, .new = nv50_sor_new },
 	.pior = { .nr = 3, .new = nv50_pior_new },
 };

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h

@@ -18,7 +18,7 @@ struct nv50_disp {
 	struct {
 		unsigned long mask;
 		int nr;
-	} head;
+	} head, dac;
 
 	struct {
 		u32 lvdsconf;
@@ -53,12 +53,7 @@ struct nv50_disp_func {
 	struct {
 		int (*cnt)(struct nvkm_disp *, unsigned long *mask);
 		int (*new)(struct nvkm_disp *, int id);
-	} head;
-
-	struct {
-		int nr;
-		int (*new)(struct nvkm_disp *, int id);
-	} dac;
+	} head, dac;
 
 	struct {
 		int nr;

drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c

@@ -64,7 +64,7 @@ gf119_disp_root_init(struct nv50_disp_root *root)
 	}
 
 	/* ... DAC caps */
-	for (i = 0; i < disp->func->dac.nr; i++) {
+	for (i = 0; i < disp->dac.nr; i++) {
 		tmp = nvkm_rd32(device, 0x61a000 + (i * 0x800));
 		nvkm_wr32(device, 0x6101c0 + (i * 0x800), tmp);
 	}

drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c

@@ -427,7 +427,7 @@ nv50_disp_root_init(struct nv50_disp_root *root)
 	}
 
 	/* ... DAC caps */
-	for (i = 0; i < disp->func->dac.nr; i++) {
+	for (i = 0; i < disp->dac.nr; i++) {
 		tmp = nvkm_rd32(device, 0x61a000 + (i * 0x800));
 		nvkm_wr32(device, 0x6101d0 + (i * 0x04), tmp);
 	}